[H][RISCV] Add support for SiFive Unmatched (LP:#1910965)

[Colin Ian King-2]

BugLink: https://bugs.launchpad.net/bugs/1910965

The SiFive HiFive Unmatched board should be supported as well as the
current Unleashed. There are various upstream commits for this support
and some misc fixes for the Unleashed and Unmatched that are required
for this board support.

Please pull the following commits into the current unstable tree. Once
we get a RISC-V derivative kernel I'll send some minor config tweaks if
necessary to align them CPU FREQ settings that match the upstream RISC-V
Unmatched/Unleashed defconfigs.

Colin

---------------------

The following changes since commit f595d95e1fdbbf217f19f9bedc597d7f27df2f23:

  UBUNTU: Ubuntu-5.11.0-4.5 (2021-01-14 12:53:26 +0100)

are available in the Git repository at:

  https://git.launchpad.net/~colin-king/+git/unstable-riscv

for you to fetch changes up to c11ce6520ff7974aef9d74440d4f89f53e0ae72c:

  SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) (2021-01-15
17:02:06 +0000)

----------------------------------------------------------------
David Abdurachmanov (4):
      PCI: microsemi: Add host driver for Microsemi PCIe controller
      Microsemi PCIe expansion board DT entry.
      SiFive Unleashed CPUFreq
      SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4)

Yash Shah (6):
      RISC-V: Update l2 cache DT documentation to add support for SiFive
FU740
      RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive
FU740
      dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
      riscv: dts: add initial support for the SiFive FU740-C000 SoC
      dt-bindings: riscv: Update YAML doc to support SiFive HiFive
Unmatched board
      riscv: dts: add initial board data for the SiFive HiFive Unmatched

 .../devicetree/bindings/gpio/sifive,gpio.yaml      |   4 +-
 .../devicetree/bindings/i2c/i2c-ocores.txt         |  10 +-
 .../devicetree/bindings/pwm/pwm-sifive.yaml        |   9 +-
 Documentation/devicetree/bindings/riscv/cpus.yaml  |   6 +
 .../devicetree/bindings/riscv/sifive-l2-cache.yaml |  35 +-
 .../devicetree/bindings/riscv/sifive.yaml          |  17 +-
 arch/riscv/Kconfig                                 |   8 +
 arch/riscv/boot/dts/sifive/Makefile                |   3 +-
 arch/riscv/boot/dts/sifive/fu540-c000.dtsi         |   5 +
 arch/riscv/boot/dts/sifive/fu740-c000.dtsi         | 293 ++++++++
 .../dts/sifive/hifive-unleashed-a00-microsemi.dts  |  28 +
 .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts |  66 ++
 .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 +++++++
 arch/riscv/configs/defconfig                       |   5 +
 drivers/pci/controller/Kconfig                     |   8 +
 drivers/pci/controller/Makefile                    |   1 +
 drivers/pci/controller/pcie-microsemi.c            | 746
+++++++++++++++++++++
 drivers/soc/sifive/sifive_l2_cache.c               |  49 +-
 18 files changed, 1522 insertions(+), 24 deletions(-)
 create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi
 create mode 100644
arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts
 create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
 create mode 100644 drivers/pci/controller/pcie-microsemi.c

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[Stefan Bader-2]

On 15.01.21 18:14, Colin Ian King wrote:

> BugLink: https://bugs.launchpad.net/bugs/1910965
>
> The SiFive HiFive Unmatched board should be supported as well as the
> current Unleashed. There are various upstream commits for this support
> and some misc fixes for the Unleashed and Unmatched that are required
> for this board support.
>
> Please pull the following commits into the current unstable tree. Once
> we get a RISC-V derivative kernel I'll send some minor config tweaks if
> necessary to align them CPU FREQ settings that match the upstream RISC-V
> Unmatched/Unleashed defconfigs.

Hm, I think you might want to re-send this with a different subject (if that has
not happened in some way already and I am just looking at old stuff). Right now,
saying hirsute has the meaning of adding it to the 5.8 forward port. But that is
not needed since we already applied it to groovy:linux-riscv.

If I read things right you mean the main unstable kernel which would better be
described as [unstable:linux] or just [unstable].

-Stefan

>
> Colin
>
> ---------------------
>
> The following changes since commit f595d95e1fdbbf217f19f9bedc597d7f27df2f23:
>
>   UBUNTU: Ubuntu-5.11.0-4.5 (2021-01-14 12:53:26 +0100)
>
> are available in the Git repository at:
>
>   https://git.launchpad.net/~colin-king/+git/unstable-riscv
>
> for you to fetch changes up to c11ce6520ff7974aef9d74440d4f89f53e0ae72c:
>
>   SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) (2021-01-15
> 17:02:06 +0000)
>
> ----------------------------------------------------------------
> David Abdurachmanov (4):
>       PCI: microsemi: Add host driver for Microsemi PCIe controller
>       Microsemi PCIe expansion board DT entry.
>       SiFive Unleashed CPUFreq
>       SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4)
>
> Yash Shah (6):
>       RISC-V: Update l2 cache DT documentation to add support for SiFive
> FU740
>       RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive
> FU740
>       dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
>       riscv: dts: add initial support for the SiFive FU740-C000 SoC
>       dt-bindings: riscv: Update YAML doc to support SiFive HiFive
> Unmatched board
>       riscv: dts: add initial board data for the SiFive HiFive Unmatched
>
>  .../devicetree/bindings/gpio/sifive,gpio.yaml      |   4 +-
>  .../devicetree/bindings/i2c/i2c-ocores.txt         |  10 +-
>  .../devicetree/bindings/pwm/pwm-sifive.yaml        |   9 +-
>  Documentation/devicetree/bindings/riscv/cpus.yaml  |   6 +
>  .../devicetree/bindings/riscv/sifive-l2-cache.yaml |  35 +-
>  .../devicetree/bindings/riscv/sifive.yaml          |  17 +-
>  arch/riscv/Kconfig                                 |   8 +
>  arch/riscv/boot/dts/sifive/Makefile                |   3 +-
>  arch/riscv/boot/dts/sifive/fu540-c000.dtsi         |   5 +
>  arch/riscv/boot/dts/sifive/fu740-c000.dtsi         | 293 ++++++++
>  .../dts/sifive/hifive-unleashed-a00-microsemi.dts  |  28 +
>  .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts |  66 ++
>  .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 +++++++
>  arch/riscv/configs/defconfig                       |   5 +
>  drivers/pci/controller/Kconfig                     |   8 +
>  drivers/pci/controller/Makefile                    |   1 +
>  drivers/pci/controller/pcie-microsemi.c            | 746
> +++++++++++++++++++++
>  drivers/soc/sifive/sifive_l2_cache.c               |  49 +-
>  18 files changed, 1522 insertions(+), 24 deletions(-)
>  create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi
>  create mode 100644
> arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts
>  create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
>  create mode 100644 drivers/pci/controller/pcie-microsemi.c
>

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[Colin Ian King-2]

On 21/01/2021 08:31, Stefan Bader wrote:

> On 15.01.21 18:14, Colin Ian King wrote:
>> BugLink: https://bugs.launchpad.net/bugs/1910965
>>
>> The SiFive HiFive Unmatched board should be supported as well as the
>> current Unleashed. There are various upstream commits for this support
>> and some misc fixes for the Unleashed and Unmatched that are required
>> for this board support.
>>
>> Please pull the following commits into the current unstable tree. Once
>> we get a RISC-V derivative kernel I'll send some minor config tweaks if
>> necessary to align them CPU FREQ settings that match the upstream RISC-V
>> Unmatched/Unleashed defconfigs.
>
> Hm, I think you might want to re-send this with a different subject (if that has
> not happened in some way already and I am just looking at old stuff). Right now,
> saying hirsute has the meaning of adding it to the 5.8 forward port. But that is
> not needed since we already applied it to groovy:linux-riscv.
>
> If I read things right you mean the main unstable kernel which would better be
> described as [unstable:linux] or just [unstable].

Apologies, it should be [unstable]

>
> -Stefan
>
>>
>> Colin
>>
>> ---------------------
>>
>> The following changes since commit f595d95e1fdbbf217f19f9bedc597d7f27df2f23:
>>
>>   UBUNTU: Ubuntu-5.11.0-4.5 (2021-01-14 12:53:26 +0100)
>>
>> are available in the Git repository at:
>>
>>   https://git.launchpad.net/~colin-king/+git/unstable-riscv
>>
>> for you to fetch changes up to c11ce6520ff7974aef9d74440d4f89f53e0ae72c:
>>
>>   SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) (2021-01-15
>> 17:02:06 +0000)
>>
>> ----------------------------------------------------------------
>> David Abdurachmanov (4):
>>       PCI: microsemi: Add host driver for Microsemi PCIe controller
>>       Microsemi PCIe expansion board DT entry.
>>       SiFive Unleashed CPUFreq
>>       SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4)
>>
>> Yash Shah (6):
>>       RISC-V: Update l2 cache DT documentation to add support for SiFive
>> FU740
>>       RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive
>> FU740
>>       dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
>>       riscv: dts: add initial support for the SiFive FU740-C000 SoC
>>       dt-bindings: riscv: Update YAML doc to support SiFive HiFive
>> Unmatched board
>>       riscv: dts: add initial board data for the SiFive HiFive Unmatched
>>
>>  .../devicetree/bindings/gpio/sifive,gpio.yaml      |   4 +-
>>  .../devicetree/bindings/i2c/i2c-ocores.txt         |  10 +-
>>  .../devicetree/bindings/pwm/pwm-sifive.yaml        |   9 +-
>>  Documentation/devicetree/bindings/riscv/cpus.yaml  |   6 +
>>  .../devicetree/bindings/riscv/sifive-l2-cache.yaml |  35 +-
>>  .../devicetree/bindings/riscv/sifive.yaml          |  17 +-
>>  arch/riscv/Kconfig                                 |   8 +
>>  arch/riscv/boot/dts/sifive/Makefile                |   3 +-
>>  arch/riscv/boot/dts/sifive/fu540-c000.dtsi         |   5 +
>>  arch/riscv/boot/dts/sifive/fu740-c000.dtsi         | 293 ++++++++
>>  .../dts/sifive/hifive-unleashed-a00-microsemi.dts  |  28 +
>>  .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts |  66 ++
>>  .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 +++++++
>>  arch/riscv/configs/defconfig                       |   5 +
>>  drivers/pci/controller/Kconfig                     |   8 +
>>  drivers/pci/controller/Makefile                    |   1 +
>>  drivers/pci/controller/pcie-microsemi.c            | 746
>> +++++++++++++++++++++
>>  drivers/soc/sifive/sifive_l2_cache.c               |  49 +-
>>  18 files changed, 1522 insertions(+), 24 deletions(-)
>>  create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi
>>  create mode 100644
>> arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts
>>  create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
>>  create mode 100644 drivers/pci/controller/pcie-microsemi.c
>>
>
>
>

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[Andrea Righi]

Applied to unstable 5.11.

Thanks,
-Andrea

On Fri, Jan 15, 2021 at 05:14:58PM +0000, Colin Ian King wrote:

> BugLink: https://bugs.launchpad.net/bugs/1910965
>
> The SiFive HiFive Unmatched board should be supported as well as the
> current Unleashed. There are various upstream commits for this support
> and some misc fixes for the Unleashed and Unmatched that are required
> for this board support.
>
> Please pull the following commits into the current unstable tree. Once
> we get a RISC-V derivative kernel I'll send some minor config tweaks if
> necessary to align them CPU FREQ settings that match the upstream RISC-V
> Unmatched/Unleashed defconfigs.
>
> Colin
>
> ---------------------
>
> The following changes since commit f595d95e1fdbbf217f19f9bedc597d7f27df2f23:
>
>   UBUNTU: Ubuntu-5.11.0-4.5 (2021-01-14 12:53:26 +0100)
>
> are available in the Git repository at:
>
>   https://git.launchpad.net/~colin-king/+git/unstable-riscv
>
> for you to fetch changes up to c11ce6520ff7974aef9d74440d4f89f53e0ae72c:
>
>   SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) (2021-01-15
> 17:02:06 +0000)
>
> ----------------------------------------------------------------
> David Abdurachmanov (4):
>       PCI: microsemi: Add host driver for Microsemi PCIe controller
>       Microsemi PCIe expansion board DT entry.
>       SiFive Unleashed CPUFreq
>       SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4)
>
> Yash Shah (6):
>       RISC-V: Update l2 cache DT documentation to add support for SiFive
> FU740
>       RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive
> FU740
>       dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
>       riscv: dts: add initial support for the SiFive FU740-C000 SoC
>       dt-bindings: riscv: Update YAML doc to support SiFive HiFive
> Unmatched board
>       riscv: dts: add initial board data for the SiFive HiFive Unmatched
>
>  .../devicetree/bindings/gpio/sifive,gpio.yaml      |   4 +-
>  .../devicetree/bindings/i2c/i2c-ocores.txt         |  10 +-
>  .../devicetree/bindings/pwm/pwm-sifive.yaml        |   9 +-
>  Documentation/devicetree/bindings/riscv/cpus.yaml  |   6 +
>  .../devicetree/bindings/riscv/sifive-l2-cache.yaml |  35 +-
>  .../devicetree/bindings/riscv/sifive.yaml          |  17 +-
>  arch/riscv/Kconfig                                 |   8 +
>  arch/riscv/boot/dts/sifive/Makefile                |   3 +-
>  arch/riscv/boot/dts/sifive/fu540-c000.dtsi         |   5 +
>  arch/riscv/boot/dts/sifive/fu740-c000.dtsi         | 293 ++++++++
>  .../dts/sifive/hifive-unleashed-a00-microsemi.dts  |  28 +
>  .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts |  66 ++
>  .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 +++++++
>  arch/riscv/configs/defconfig                       |   5 +
>  drivers/pci/controller/Kconfig                     |   8 +
>  drivers/pci/controller/Makefile                    |   1 +
>  drivers/pci/controller/pcie-microsemi.c            | 746
> +++++++++++++++++++++
>  drivers/soc/sifive/sifive_l2_cache.c               |  49 +-
>  18 files changed, 1522 insertions(+), 24 deletions(-)
>  create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi
>  create mode 100644
> arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts
>  create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
>  create mode 100644 drivers/pci/controller/pcie-microsemi.c
>
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[Colin Ian King-2]

On 21/01/2021 15:35, Andrea Righi wrote:
> Applied to unstable 5.11.
>
> Thanks,
> -Andrea

Thank you Andrea. Much appreciated.

>
> On Fri, Jan 15, 2021 at 05:14:58PM +0000, Colin Ian King wrote:
>> BugLink: https://bugs.launchpad.net/bugs/1910965
>>
>> The SiFive HiFive Unmatched board should be supported as well as the
>> current Unleashed. There are various upstream commits for this support
>> and some misc fixes for the Unleashed and Unmatched that are required
>> for this board support.
>>
>> Please pull the following commits into the current unstable tree. Once
>> we get a RISC-V derivative kernel I'll send some minor config tweaks if
>> necessary to align them CPU FREQ settings that match the upstream RISC-V
>> Unmatched/Unleashed defconfigs.
>>
>> Colin
>>
>> ---------------------
>>
>> The following changes since commit f595d95e1fdbbf217f19f9bedc597d7f27df2f23:
>>
>>   UBUNTU: Ubuntu-5.11.0-4.5 (2021-01-14 12:53:26 +0100)
>>
>> are available in the Git repository at:
>>
>>   https://git.launchpad.net/~colin-king/+git/unstable-riscv
>>
>> for you to fetch changes up to c11ce6520ff7974aef9d74440d4f89f53e0ae72c:
>>
>>   SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4) (2021-01-15
>> 17:02:06 +0000)
>>
>> ----------------------------------------------------------------
>> David Abdurachmanov (4):
>>       PCI: microsemi: Add host driver for Microsemi PCIe controller
>>       Microsemi PCIe expansion board DT entry.
>>       SiFive Unleashed CPUFreq
>>       SiFive HiFive Unleashed: Add PWM LEDs (D1, D2, D3, D4)
>>
>> Yash Shah (6):
>>       RISC-V: Update l2 cache DT documentation to add support for SiFive
>> FU740
>>       RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive
>> FU740
>>       dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
>>       riscv: dts: add initial support for the SiFive FU740-C000 SoC
>>       dt-bindings: riscv: Update YAML doc to support SiFive HiFive
>> Unmatched board
>>       riscv: dts: add initial board data for the SiFive HiFive Unmatched
>>
>>  .../devicetree/bindings/gpio/sifive,gpio.yaml      |   4 +-
>>  .../devicetree/bindings/i2c/i2c-ocores.txt         |  10 +-
>>  .../devicetree/bindings/pwm/pwm-sifive.yaml        |   9 +-
>>  Documentation/devicetree/bindings/riscv/cpus.yaml  |   6 +
>>  .../devicetree/bindings/riscv/sifive-l2-cache.yaml |  35 +-
>>  .../devicetree/bindings/riscv/sifive.yaml          |  17 +-
>>  arch/riscv/Kconfig                                 |   8 +
>>  arch/riscv/boot/dts/sifive/Makefile                |   3 +-
>>  arch/riscv/boot/dts/sifive/fu540-c000.dtsi         |   5 +
>>  arch/riscv/boot/dts/sifive/fu740-c000.dtsi         | 293 ++++++++
>>  .../dts/sifive/hifive-unleashed-a00-microsemi.dts  |  28 +
>>  .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts |  66 ++
>>  .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 +++++++
>>  arch/riscv/configs/defconfig                       |   5 +
>>  drivers/pci/controller/Kconfig                     |   8 +
>>  drivers/pci/controller/Makefile                    |   1 +
>>  drivers/pci/controller/pcie-microsemi.c            | 746
>> +++++++++++++++++++++
>>  drivers/soc/sifive/sifive_l2_cache.c               |  49 +-
>>  18 files changed, 1522 insertions(+), 24 deletions(-)
>>  create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi
>>  create mode 100644
>> arch/riscv/boot/dts/sifive/hifive-unleashed-a00-microsemi.dts
>>  create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
>>  create mode 100644 drivers/pci/controller/pcie-microsemi.c
>>
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