[PATCH][Disco][SRU Cosmic][SRU Bionic] net: hns3: Set tx ring' tc info when netdev is up

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[PATCH][Disco][SRU Cosmic][SRU Bionic] net: hns3: Set tx ring' tc info when netdev is up

dann frazier-4
From: Yunsheng Lin <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1802023

The HNS3_RING_TX_RING_TC_REG register is used to map tx ring to
specific tc, the tx queue to tc mapping is needed by the hardware
to do the correct tx schedule.

Signed-off-by: Yunsheng Lin <[hidden email]>
Signed-off-by: Peng Li <[hidden email]>
Signed-off-by: Salil Mehta <[hidden email]>
Signed-off-by: David S. Miller <[hidden email]>
(backported from commit 1c77215480bcfa0852575180f997bd156f2aef17)
[ dannf: Trivial offset fix in hns3_enet.h ]
Signed-off-by: dann frazier <[hidden email]>
---
 .../net/ethernet/hisilicon/hns3/hns3_enet.c   | 24 +++++++++++++++++++
 .../net/ethernet/hisilicon/hns3/hns3_enet.h   |  1 +
 2 files changed, 25 insertions(+)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index 18c93eb9c045e..f6ca760ea65c8 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -2998,6 +2998,28 @@ static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
  }
 }
 
+static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
+{
+ struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
+ int i;
+
+ for (i = 0; i < HNAE3_MAX_TC; i++) {
+ struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
+ int j;
+
+ if (!tc_info->enable)
+ continue;
+
+ for (j = 0; j < tc_info->tqp_count; j++) {
+ struct hnae3_queue *q;
+
+ q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
+ hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
+       tc_info->tc);
+ }
+ }
+}
+
 int hns3_init_all_ring(struct hns3_nic_priv *priv)
 {
  struct hnae3_handle *h = priv->ae_handle;
@@ -3409,6 +3431,8 @@ int hns3_nic_reset_all_ring(struct hnae3_handle *h)
  rx_ring->next_to_use = 0;
  }
 
+ hns3_init_tx_ring_tc(priv);
+
  return 0;
 }
 
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
index e4b4a8f2ceaab..902b751206608 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
@@ -38,6 +38,7 @@ enum hns3_nic_state {
 #define HNS3_RING_TX_RING_BASEADDR_H_REG 0x00044
 #define HNS3_RING_TX_RING_BD_NUM_REG 0x00048
 #define HNS3_RING_TX_RING_BD_LEN_REG 0x0004C
+#define HNS3_RING_TX_RING_TC_REG 0x00050
 #define HNS3_RING_TX_RING_TAIL_REG 0x00058
 #define HNS3_RING_TX_RING_HEAD_REG 0x0005C
 #define HNS3_RING_TX_RING_FBDNUM_REG 0x00060
--
2.19.1


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ACK: [PATCH][Disco][SRU Cosmic][SRU Bionic] net: hns3: Set tx ring' tc info when netdev is up

Kleber Souza
On 11/07/18 02:25, dann frazier wrote:

> From: Yunsheng Lin <[hidden email]>
>
> BugLink: https://bugs.launchpad.net/bugs/1802023
>
> The HNS3_RING_TX_RING_TC_REG register is used to map tx ring to
> specific tc, the tx queue to tc mapping is needed by the hardware
> to do the correct tx schedule.
>
> Signed-off-by: Yunsheng Lin <[hidden email]>
> Signed-off-by: Peng Li <[hidden email]>
> Signed-off-by: Salil Mehta <[hidden email]>
> Signed-off-by: David S. Miller <[hidden email]>
> (backported from commit 1c77215480bcfa0852575180f997bd156f2aef17)
> [ dannf: Trivial offset fix in hns3_enet.h ]
> Signed-off-by: dann frazier <[hidden email]>

Acked-by: Kleber Sacilotto de Souza <[hidden email]>

> ---
>  .../net/ethernet/hisilicon/hns3/hns3_enet.c   | 24 +++++++++++++++++++
>  .../net/ethernet/hisilicon/hns3/hns3_enet.h   |  1 +
>  2 files changed, 25 insertions(+)
>
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> index 18c93eb9c045e..f6ca760ea65c8 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> @@ -2998,6 +2998,28 @@ static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
>   }
>  }
>  
> +static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
> +{
> + struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
> + int i;
> +
> + for (i = 0; i < HNAE3_MAX_TC; i++) {
> + struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
> + int j;
> +
> + if (!tc_info->enable)
> + continue;
> +
> + for (j = 0; j < tc_info->tqp_count; j++) {
> + struct hnae3_queue *q;
> +
> + q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
> + hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
> +       tc_info->tc);
> + }
> + }
> +}
> +
>  int hns3_init_all_ring(struct hns3_nic_priv *priv)
>  {
>   struct hnae3_handle *h = priv->ae_handle;
> @@ -3409,6 +3431,8 @@ int hns3_nic_reset_all_ring(struct hnae3_handle *h)
>   rx_ring->next_to_use = 0;
>   }
>  
> + hns3_init_tx_ring_tc(priv);
> +
>   return 0;
>  }
>  
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> index e4b4a8f2ceaab..902b751206608 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> @@ -38,6 +38,7 @@ enum hns3_nic_state {
>  #define HNS3_RING_TX_RING_BASEADDR_H_REG 0x00044
>  #define HNS3_RING_TX_RING_BD_NUM_REG 0x00048
>  #define HNS3_RING_TX_RING_BD_LEN_REG 0x0004C
> +#define HNS3_RING_TX_RING_TC_REG 0x00050
>  #define HNS3_RING_TX_RING_TAIL_REG 0x00058
>  #define HNS3_RING_TX_RING_HEAD_REG 0x0005C
>  #define HNS3_RING_TX_RING_FBDNUM_REG 0x00060



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ACK: [PATCH][Disco][SRU Cosmic][SRU Bionic] net: hns3: Set tx ring' tc info when netdev is up

Stefan Bader-2
In reply to this post by dann frazier-4
On 07.11.18 02:25, dann frazier wrote:

> From: Yunsheng Lin <[hidden email]>
>
> BugLink: https://bugs.launchpad.net/bugs/1802023
>
> The HNS3_RING_TX_RING_TC_REG register is used to map tx ring to
> specific tc, the tx queue to tc mapping is needed by the hardware
> to do the correct tx schedule.
>
> Signed-off-by: Yunsheng Lin <[hidden email]>
> Signed-off-by: Peng Li <[hidden email]>
> Signed-off-by: Salil Mehta <[hidden email]>
> Signed-off-by: David S. Miller <[hidden email]>
> (backported from commit 1c77215480bcfa0852575180f997bd156f2aef17)
> [ dannf: Trivial offset fix in hns3_enet.h ]
> Signed-off-by: dann frazier <[hidden email]>
Acked-by: Stefan Bader <[hidden email]>

> ---
>  .../net/ethernet/hisilicon/hns3/hns3_enet.c   | 24 +++++++++++++++++++
>  .../net/ethernet/hisilicon/hns3/hns3_enet.h   |  1 +
>  2 files changed, 25 insertions(+)
>
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> index 18c93eb9c045e..f6ca760ea65c8 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> @@ -2998,6 +2998,28 @@ static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
>   }
>  }
>  
> +static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
> +{
> + struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
> + int i;
> +
> + for (i = 0; i < HNAE3_MAX_TC; i++) {
> + struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
> + int j;
> +
> + if (!tc_info->enable)
> + continue;
> +
> + for (j = 0; j < tc_info->tqp_count; j++) {
> + struct hnae3_queue *q;
> +
> + q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
> + hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
> +       tc_info->tc);
> + }
> + }
> +}
> +
>  int hns3_init_all_ring(struct hns3_nic_priv *priv)
>  {
>   struct hnae3_handle *h = priv->ae_handle;
> @@ -3409,6 +3431,8 @@ int hns3_nic_reset_all_ring(struct hnae3_handle *h)
>   rx_ring->next_to_use = 0;
>   }
>  
> + hns3_init_tx_ring_tc(priv);
> +
>   return 0;
>  }
>  
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> index e4b4a8f2ceaab..902b751206608 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> @@ -38,6 +38,7 @@ enum hns3_nic_state {
>  #define HNS3_RING_TX_RING_BASEADDR_H_REG 0x00044
>  #define HNS3_RING_TX_RING_BD_NUM_REG 0x00048
>  #define HNS3_RING_TX_RING_BD_LEN_REG 0x0004C
> +#define HNS3_RING_TX_RING_TC_REG 0x00050
>  #define HNS3_RING_TX_RING_TAIL_REG 0x00058
>  #define HNS3_RING_TX_RING_HEAD_REG 0x0005C
>  #define HNS3_RING_TX_RING_FBDNUM_REG 0x00060
>


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APPLIED(Cosmic): [PATCH][Disco][SRU Cosmic][SRU Bionic] net: hns3: Set tx ring' tc info when netdev is up

Khaled Elmously
In reply to this post by dann frazier-4
On 2018-11-06 18:25:38 , dann frazier wrote:

> From: Yunsheng Lin <[hidden email]>
>
> BugLink: https://bugs.launchpad.net/bugs/1802023
>
> The HNS3_RING_TX_RING_TC_REG register is used to map tx ring to
> specific tc, the tx queue to tc mapping is needed by the hardware
> to do the correct tx schedule.
>
> Signed-off-by: Yunsheng Lin <[hidden email]>
> Signed-off-by: Peng Li <[hidden email]>
> Signed-off-by: Salil Mehta <[hidden email]>
> Signed-off-by: David S. Miller <[hidden email]>
> (backported from commit 1c77215480bcfa0852575180f997bd156f2aef17)
> [ dannf: Trivial offset fix in hns3_enet.h ]
> Signed-off-by: dann frazier <[hidden email]>
> ---
>  .../net/ethernet/hisilicon/hns3/hns3_enet.c   | 24 +++++++++++++++++++
>  .../net/ethernet/hisilicon/hns3/hns3_enet.h   |  1 +
>  2 files changed, 25 insertions(+)
>
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> index 18c93eb9c045e..f6ca760ea65c8 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> @@ -2998,6 +2998,28 @@ static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
>   }
>  }
>  
> +static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
> +{
> + struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
> + int i;
> +
> + for (i = 0; i < HNAE3_MAX_TC; i++) {
> + struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
> + int j;
> +
> + if (!tc_info->enable)
> + continue;
> +
> + for (j = 0; j < tc_info->tqp_count; j++) {
> + struct hnae3_queue *q;
> +
> + q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
> + hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
> +       tc_info->tc);
> + }
> + }
> +}
> +
>  int hns3_init_all_ring(struct hns3_nic_priv *priv)
>  {
>   struct hnae3_handle *h = priv->ae_handle;
> @@ -3409,6 +3431,8 @@ int hns3_nic_reset_all_ring(struct hnae3_handle *h)
>   rx_ring->next_to_use = 0;
>   }
>  
> + hns3_init_tx_ring_tc(priv);
> +
>   return 0;
>  }
>  
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> index e4b4a8f2ceaab..902b751206608 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> @@ -38,6 +38,7 @@ enum hns3_nic_state {
>  #define HNS3_RING_TX_RING_BASEADDR_H_REG 0x00044
>  #define HNS3_RING_TX_RING_BD_NUM_REG 0x00048
>  #define HNS3_RING_TX_RING_BD_LEN_REG 0x0004C
> +#define HNS3_RING_TX_RING_TC_REG 0x00050
>  #define HNS3_RING_TX_RING_TAIL_REG 0x00058
>  #define HNS3_RING_TX_RING_HEAD_REG 0x0005C
>  #define HNS3_RING_TX_RING_FBDNUM_REG 0x00060
> --
> 2.19.1
>
>
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APPLIED(Bionic): [PATCH][Disco][SRU Cosmic][SRU Bionic] net: hns3: Set tx ring' tc info when netdev is up

Khaled Elmously
In reply to this post by dann frazier-4
On 2018-11-06 18:25:38 , dann frazier wrote:

> From: Yunsheng Lin <[hidden email]>
>
> BugLink: https://bugs.launchpad.net/bugs/1802023
>
> The HNS3_RING_TX_RING_TC_REG register is used to map tx ring to
> specific tc, the tx queue to tc mapping is needed by the hardware
> to do the correct tx schedule.
>
> Signed-off-by: Yunsheng Lin <[hidden email]>
> Signed-off-by: Peng Li <[hidden email]>
> Signed-off-by: Salil Mehta <[hidden email]>
> Signed-off-by: David S. Miller <[hidden email]>
> (backported from commit 1c77215480bcfa0852575180f997bd156f2aef17)
> [ dannf: Trivial offset fix in hns3_enet.h ]
> Signed-off-by: dann frazier <[hidden email]>
> ---
>  .../net/ethernet/hisilicon/hns3/hns3_enet.c   | 24 +++++++++++++++++++
>  .../net/ethernet/hisilicon/hns3/hns3_enet.h   |  1 +
>  2 files changed, 25 insertions(+)
>
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> index 18c93eb9c045e..f6ca760ea65c8 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
> @@ -2998,6 +2998,28 @@ static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
>   }
>  }
>  
> +static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
> +{
> + struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
> + int i;
> +
> + for (i = 0; i < HNAE3_MAX_TC; i++) {
> + struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
> + int j;
> +
> + if (!tc_info->enable)
> + continue;
> +
> + for (j = 0; j < tc_info->tqp_count; j++) {
> + struct hnae3_queue *q;
> +
> + q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
> + hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
> +       tc_info->tc);
> + }
> + }
> +}
> +
>  int hns3_init_all_ring(struct hns3_nic_priv *priv)
>  {
>   struct hnae3_handle *h = priv->ae_handle;
> @@ -3409,6 +3431,8 @@ int hns3_nic_reset_all_ring(struct hnae3_handle *h)
>   rx_ring->next_to_use = 0;
>   }
>  
> + hns3_init_tx_ring_tc(priv);
> +
>   return 0;
>  }
>  
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> index e4b4a8f2ceaab..902b751206608 100644
> --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
> @@ -38,6 +38,7 @@ enum hns3_nic_state {
>  #define HNS3_RING_TX_RING_BASEADDR_H_REG 0x00044
>  #define HNS3_RING_TX_RING_BD_NUM_REG 0x00048
>  #define HNS3_RING_TX_RING_BD_LEN_REG 0x0004C
> +#define HNS3_RING_TX_RING_TC_REG 0x00050
>  #define HNS3_RING_TX_RING_TAIL_REG 0x00058
>  #define HNS3_RING_TX_RING_HEAD_REG 0x0005C
>  #define HNS3_RING_TX_RING_FBDNUM_REG 0x00060
> --
> 2.19.1
>
>
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APPLIED[U]: [PATCH][Disco][SRU Cosmic][SRU Bionic] net: hns3: Set tx ring' tc info when netdev is up

Thadeu Lima de Souza Cascardo-3
In reply to this post by dann frazier-4
This is already in unstable/master, as it is upstream as of 4.19.

Cascardo.

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