[PATCH][unstable][Artful][SRU Zesty] iommu/arm-smmu: Plumb in new ACPI identifiers

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[PATCH][unstable][Artful][SRU Zesty] iommu/arm-smmu: Plumb in new ACPI identifiers

dann frazier-4
From: Robin Murphy <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1703437

Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
ThunderX implementation. Wire them up so that we can probe these models
once firmware starts using the new codes in place of generic ones, and
so that the appropriate features and quirks get enabled when we do.

For the sake of backports and mitigating sychronisation problems with
the ACPICA headers, we'll carry a backup copy of the new definitions
locally for the short term to make life simpler.

CC: [hidden email] # 4.10
Acked-by: Robert Richter <[hidden email]>
Tested-by: Robert Richter <[hidden email]>
Signed-off-by: Robin Murphy <[hidden email]>
Signed-off-by: Will Deacon <[hidden email]>
(cherry picked from commit 84c24379a783c514e5ff7c8fc8a21cf8d64fd05f)
Signed-off-by: dann frazier <[hidden email]>
---
 drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index e63d0e8b656c..9aee256fca84 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -310,6 +310,14 @@ enum arm_smmu_implementation {
  CAVIUM_SMMUV2,
 };
 
+/* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_CORELINK_MMU401
+#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4
+#endif
+#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX
+#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5
+#endif
+
 struct arm_smmu_s2cr {
  struct iommu_group *group;
  int count;
@@ -2011,6 +2019,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
  smmu->version = ARM_SMMU_V1;
  smmu->model = GENERIC_SMMU;
  break;
+ case ACPI_IORT_SMMU_CORELINK_MMU401:
+ smmu->version = ARM_SMMU_V1_64K;
+ smmu->model = GENERIC_SMMU;
+ break;
  case ACPI_IORT_SMMU_V2:
  smmu->version = ARM_SMMU_V2;
  smmu->model = GENERIC_SMMU;
@@ -2019,6 +2031,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
  smmu->version = ARM_SMMU_V2;
  smmu->model = ARM_MMU500;
  break;
+ case ACPI_IORT_SMMU_CAVIUM_THUNDERX:
+ smmu->version = ARM_SMMU_V2;
+ smmu->model = CAVIUM_SMMUV2;
+ break;
  default:
  ret = -ENODEV;
  }
--
2.13.2


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ACK / APPLIED[artful]: [PATCH][unstable][Artful][SRU Zesty] iommu/arm-smmu: Plumb in new ACPI identifiers

Seth Forshee
On Wed, Jul 12, 2017 at 01:36:35PM -0600, dann frazier wrote:

> From: Robin Murphy <[hidden email]>
>
> BugLink: https://bugs.launchpad.net/bugs/1703437
>
> Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
> ThunderX implementation. Wire them up so that we can probe these models
> once firmware starts using the new codes in place of generic ones, and
> so that the appropriate features and quirks get enabled when we do.
>
> For the sake of backports and mitigating sychronisation problems with
> the ACPICA headers, we'll carry a backup copy of the new definitions
> locally for the short term to make life simpler.
>
> CC: [hidden email] # 4.10
> Acked-by: Robert Richter <[hidden email]>
> Tested-by: Robert Richter <[hidden email]>
> Signed-off-by: Robin Murphy <[hidden email]>
> Signed-off-by: Will Deacon <[hidden email]>
> (cherry picked from commit 84c24379a783c514e5ff7c8fc8a21cf8d64fd05f)
> Signed-off-by: dann frazier <[hidden email]>

Applied to artful/master-next and unstable/master, thanks.

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ACK: [PATCH][unstable][Artful][SRU Zesty] iommu/arm-smmu: Plumb in new ACPI identifiers

Stefan Bader-2
In reply to this post by dann frazier-4
On 12.07.2017 21:36, dann frazier wrote:

> From: Robin Murphy <[hidden email]>
>
> BugLink: https://bugs.launchpad.net/bugs/1703437
>
> Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
> ThunderX implementation. Wire them up so that we can probe these models
> once firmware starts using the new codes in place of generic ones, and
> so that the appropriate features and quirks get enabled when we do.
>
> For the sake of backports and mitigating sychronisation problems with
> the ACPICA headers, we'll carry a backup copy of the new definitions
> locally for the short term to make life simpler.
>
> CC: [hidden email] # 4.10
> Acked-by: Robert Richter <[hidden email]>
> Tested-by: Robert Richter <[hidden email]>
> Signed-off-by: Robin Murphy <[hidden email]>
> Signed-off-by: Will Deacon <[hidden email]>
> (cherry picked from commit 84c24379a783c514e5ff7c8fc8a21cf8d64fd05f)
> Signed-off-by: dann frazier <[hidden email]>
Acked-by: Stefan Bader <[hidden email]>

> ---
>  drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index e63d0e8b656c..9aee256fca84 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -310,6 +310,14 @@ enum arm_smmu_implementation {
>   CAVIUM_SMMUV2,
>  };
>  
> +/* Until ACPICA headers cover IORT rev. C */
> +#ifndef ACPI_IORT_SMMU_CORELINK_MMU401
> +#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4
> +#endif
> +#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX
> +#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5
> +#endif
> +
>  struct arm_smmu_s2cr {
>   struct iommu_group *group;
>   int count;
> @@ -2011,6 +2019,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
>   smmu->version = ARM_SMMU_V1;
>   smmu->model = GENERIC_SMMU;
>   break;
> + case ACPI_IORT_SMMU_CORELINK_MMU401:
> + smmu->version = ARM_SMMU_V1_64K;
> + smmu->model = GENERIC_SMMU;
> + break;
>   case ACPI_IORT_SMMU_V2:
>   smmu->version = ARM_SMMU_V2;
>   smmu->model = GENERIC_SMMU;
> @@ -2019,6 +2031,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
>   smmu->version = ARM_SMMU_V2;
>   smmu->model = ARM_MMU500;
>   break;
> + case ACPI_IORT_SMMU_CAVIUM_THUNDERX:
> + smmu->version = ARM_SMMU_V2;
> + smmu->model = CAVIUM_SMMUV2;
> + break;
>   default:
>   ret = -ENODEV;
>   }
>


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APPLIED: [PATCH][unstable][Artful][SRU Zesty] iommu/arm-smmu: Plumb in new ACPI identifiers

Thadeu Lima de Souza Cascardo-3
In reply to this post by dann frazier-4
Applied to zesty master-next branch.

Thanks.
Cascardo.

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