[PATCHv2 0/6][SRU][Bionic] amdgpu with mst WARNING on blanking

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[PATCHv2 0/6][SRU][Bionic] amdgpu with mst WARNING on blanking

Dan Streetman
From: Dan Streetman <[hidden email]>

This series fixes amdgpu screen blanking when using displayport monitors
in MST configuration (i.e. displayport "daisy chaining").

Note that the amdgpu driver, and DP MST, appears to be quite problematic,
even upstream, and this patchset doesn't appear to fix all paths that
lead to this WARNING being issued (and/or other amdgpu problems/failures).
However it does appear to correct the simple case of this warning being
issued (sometimes along with more serious failures) for each screen
blanking/unblanking.

This is changed from the v1 series by adding 3 more patches so all
are complete cherry-picks, with no backporting (other than minor
context differences) required.

Andrew Jiang (1):
  drm/amd/display: Don't use dc_link in link_encoder

Charlene Liu (1):
  drm/amd/display: eDP sequence BL off first then DP blank.

Harry Wentland (1):
  drm/amd/display: Fix warning about misaligned code

Jerry (Fangzhi) Zuo (1):
  drm/amd/display: Fix MST dp_blank REG_WAIT timeout

Leo (Sunpeng) Li (1):
  drm/amd/display: Fix unused variable compilation error

Yongqiang Sun (1):
  drm/amd/display: Move wait for hpd ready out from edp power control.

 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 30 ++++++--
 .../drm/amd/display/dc/core/dc_link_hwss.c    | 20 ++---
 .../drm/amd/display/dc/dce/dce_link_encoder.c | 24 +-----
 .../drm/amd/display/dc/dce/dce_link_encoder.h |  5 +-
 .../display/dc/dce110/dce110_hw_sequencer.c   | 73 ++++++++++++-------
 .../display/dc/dce110/dce110_hw_sequencer.h   |  9 ++-
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  7 +-
 .../drm/amd/display/dc/inc/hw/link_encoder.h  |  2 +-
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  5 +-
 .../display/dc/virtual/virtual_link_encoder.c |  3 +-
 10 files changed, 100 insertions(+), 78 deletions(-)

--
2.20.1


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[PATCHv2 1/6][SRU][Bionic] drm/amd/display: Don't use dc_link in link_encoder

Dan Streetman
From: Andrew Jiang <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1814308

dc_link is at a higher level than link_encoder, and we only want
higher-level components to be able to access lower-level ones,
not the other way around.

Signed-off-by: Andrew Jiang <[hidden email]>
Reviewed-by: Tony Cheng <[hidden email]>
Acked-by: Harry Wentland <[hidden email]>
Signed-off-by: Alex Deucher <[hidden email]>
(cherry picked from commit 069d418f412ec4b33056dc7d84b63c80c2e50abf)
Signed-off-by: Dan Streetman <[hidden email]>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c |  2 +-
 .../drm/amd/display/dc/core/dc_link_hwss.c    | 11 ++---
 .../drm/amd/display/dc/dce/dce_link_encoder.c | 34 ++++++--------
 .../drm/amd/display/dc/dce/dce_link_encoder.h |  5 +-
 .../display/dc/dce110/dce110_hw_sequencer.c   | 46 +++++++++++--------
 .../display/dc/dce110/dce110_hw_sequencer.h   |  4 +-
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  3 ++
 .../drm/amd/display/dc/inc/hw/link_encoder.h  |  2 +-
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  2 +-
 .../display/dc/virtual/virtual_link_encoder.c |  3 +-
 10 files changed, 57 insertions(+), 55 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 42a111b9505d..2bcd19328329 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1798,7 +1798,7 @@ static void disable_link(struct dc_link *link, enum signal_type signal)
  else
  dp_disable_link_phy_mst(link, signal);
  } else
- link->link_enc->funcs->disable_output(link->link_enc, signal, link);
+ link->link_enc->funcs->disable_output(link->link_enc, signal);
 }
 
 static bool dp_active_dongle_validate_timing(
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index 9a33b471270a..f2902569be2e 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -89,7 +89,7 @@ void dp_enable_link_phy(
 
  if (dc_is_dp_sst_signal(signal)) {
  if (signal == SIGNAL_TYPE_EDP) {
- link->dc->hwss.edp_power_control(link->link_enc, true);
+ link->dc->hwss.edp_power_control(link, true);
  link_enc->funcs->enable_dp_output(
  link_enc,
  link_settings,
@@ -140,10 +140,10 @@ void dp_disable_link_phy(struct dc_link *link, enum signal_type signal)
  if (signal == SIGNAL_TYPE_EDP) {
  link->dc->hwss.edp_backlight_control(link, false);
  edp_receiver_ready_T9(link);
- link->link_enc->funcs->disable_output(link->link_enc, signal, link);
- link->dc->hwss.edp_power_control(link->link_enc, false);
+ link->link_enc->funcs->disable_output(link->link_enc, signal);
+ link->dc->hwss.edp_power_control(link, false);
  } else
- link->link_enc->funcs->disable_output(link->link_enc, signal, link);
+ link->link_enc->funcs->disable_output(link->link_enc, signal);
 
  /* Clear current link setting.*/
  memset(&link->cur_link_settings, 0,
@@ -286,8 +286,7 @@ void dp_retrain_link_dp_test(struct dc_link *link,
 
  link->link_enc->funcs->disable_output(
  link->link_enc,
- SIGNAL_TYPE_DISPLAY_PORT,
- link);
+ SIGNAL_TYPE_DISPLAY_PORT);
 
  /* Clear current link setting. */
  memset(&link->cur_link_settings, 0,
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
index 00c728260616..e0e50f9005d6 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -855,8 +855,6 @@ void dce110_link_encoder_hw_init(
 
  ASSERT(result == BP_RESULT_OK);
 
- } else if (enc110->base.connector.id == CONNECTOR_ID_EDP) {
- ctx->dc->hwss.edp_power_control(enc, true);
  }
  aux_initialize(enc110);
 
@@ -1043,8 +1041,7 @@ void dce110_link_encoder_enable_dp_mst_output(
  */
 void dce110_link_encoder_disable_output(
  struct link_encoder *enc,
- enum signal_type signal,
- struct dc_link *link)
+ enum signal_type signal)
 {
  struct dce110_link_encoder *enc110 = TO_DCE110_LINK_ENC(enc);
  struct dc_context *ctx = enc110->base.ctx;
@@ -1055,8 +1052,6 @@ void dce110_link_encoder_disable_output(
  /* OF_SKIP_POWER_DOWN_INACTIVE_ENCODER */
  return;
  }
- if (enc110->base.connector.id == CONNECTOR_ID_EDP)
- ctx->dc->hwss.edp_backlight_control(link, false);
  /* Power-down RX and disable GPU PHY should be paired.
  * Disabling PHY without powering down RX may cause
  * symbol lock loss, on which we will get DP Sink interrupt. */
@@ -1088,19 +1083,20 @@ void dce110_link_encoder_disable_output(
  if (dc_is_dp_signal(signal))
  link_encoder_disable(enc110);
 
- if (enc110->base.connector.id == CONNECTOR_ID_EDP) {
- /* power down eDP panel */
- /* TODO: Power control cause regression, we should implement
- * it properly, for now just comment it.
- *
- * link_encoder_edp_wait_for_hpd_ready(
- link_enc,
- link_enc->connector,
- false);
-
- * link_encoder_edp_power_control(
- link_enc, false); */
- }
+ /*
+ * TODO: Power control cause regression, we should implement
+ * it properly, for now just comment it.
+ */
+// if (enc110->base.connector.id == CONNECTOR_ID_EDP) {
+// /* power down eDP panel */
+// link_encoder_edp_wait_for_hpd_ready(
+// enc,
+// enc->connector,
+// false);
+//
+// link_encoder_edp_power_control(
+// enc, false);
+// }
 }
 
 void dce110_link_encoder_dp_set_lane_settings(
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
index 494067dedd03..8ca9afe47a2b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
@@ -228,9 +228,8 @@ void dce110_link_encoder_enable_dp_mst_output(
 
 /* disable PHY output */
 void dce110_link_encoder_disable_output(
- struct link_encoder *link_enc,
- enum signal_type signal,
- struct dc_link *link);
+ struct link_encoder *enc,
+ enum signal_type signal);
 
 /* set DP lane settings */
 void dce110_link_encoder_dp_set_lane_settings(
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index d844fadcd56f..97dfe9e2f1ac 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -814,11 +814,11 @@ static enum bp_result link_transmitter_control(
  * eDP only.
  */
 void hwss_edp_wait_for_hpd_ready(
- struct link_encoder *enc,
- bool power_up)
+ struct dc_link *link,
+ bool power_up)
 {
- struct dc_context *ctx = enc->ctx;
- struct graphics_object_id connector = enc->connector;
+ struct dc_context *ctx = link->ctx;
+ struct graphics_object_id connector = link->link_enc->connector;
  struct gpio *hpd;
  bool edp_hpd_high = false;
  uint32_t time_elapsed = 0;
@@ -882,16 +882,16 @@ void hwss_edp_wait_for_hpd_ready(
 }
 
 void hwss_edp_power_control(
- struct link_encoder *enc,
- bool power_up)
+ struct dc_link *link,
+ bool power_up)
 {
- struct dc_context *ctx = enc->ctx;
+ struct dc_context *ctx = link->ctx;
  struct dce_hwseq *hwseq = ctx->dc->hwseq;
  struct bp_transmitter_control cntl = { 0 };
  enum bp_result bp_result;
 
 
- if (dal_graphics_object_id_get_connector_id(enc->connector)
+ if (dal_graphics_object_id_get_connector_id(link->link_enc->connector)
  != CONNECTOR_ID_EDP) {
  BREAK_TO_DEBUGGER();
  return;
@@ -907,11 +907,11 @@ void hwss_edp_power_control(
  cntl.action = power_up ?
  TRANSMITTER_CONTROL_POWER_ON :
  TRANSMITTER_CONTROL_POWER_OFF;
- cntl.transmitter = enc->transmitter;
- cntl.connector_obj_id = enc->connector;
+ cntl.transmitter = link->link_enc->transmitter;
+ cntl.connector_obj_id = link->link_enc->connector;
  cntl.coherent = false;
  cntl.lanes_number = LANE_COUNT_FOUR;
- cntl.hpd_sel = enc->hpd_source;
+ cntl.hpd_sel = link->link_enc->hpd_source;
 
  bp_result = link_transmitter_control(ctx->dc_bios, &cntl);
 
@@ -925,7 +925,7 @@ void hwss_edp_power_control(
  __func__, (power_up ? "On":"Off"));
  }
 
- hwss_edp_wait_for_hpd_ready(enc, true);
+ hwss_edp_wait_for_hpd_ready(link, true);
 }
 
 /*todo: cloned in stream enc, fix*/
@@ -934,14 +934,14 @@ void hwss_edp_power_control(
  * eDP only. Control the backlight of the eDP panel
  */
 void hwss_edp_backlight_control(
- struct dc_link *link,
- bool enable)
+ struct dc_link *link,
+ bool enable)
 {
- struct dce_hwseq *hws = link->dc->hwseq;
- struct dc_context *ctx = link->dc->ctx;
+ struct dc_context *ctx = link->ctx;
+ struct dce_hwseq *hws = ctx->dc->hwseq;
  struct bp_transmitter_control cntl = { 0 };
 
- if (dal_graphics_object_id_get_connector_id(link->link_id)
+ if (dal_graphics_object_id_get_connector_id(link->link_enc->connector)
  != CONNECTOR_ID_EDP) {
  BREAK_TO_DEBUGGER();
  return;
@@ -982,7 +982,7 @@ void hwss_edp_backlight_control(
  * Enable it in the future if necessary.
  */
  /* dc_service_sleep_in_milliseconds(50); */
- link_transmitter_control(link->dc->ctx->dc_bios, &cntl);
+ link_transmitter_control(ctx->dc_bios, &cntl);
 }
 
 void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option)
@@ -1396,12 +1396,14 @@ static void power_down_encoders(struct dc *dc)
 
  if (!dc->links[i]->wa_flags.dp_keep_receiver_powered)
  dp_receiver_power_ctrl(dc->links[i], false);
- if (connector_id == CONNECTOR_ID_EDP)
+ if (connector_id == CONNECTOR_ID_EDP) {
  signal = SIGNAL_TYPE_EDP;
+ hwss_edp_backlight_control(dc->links[i], false);
+ }
  }
 
  dc->links[i]->link_enc->funcs->disable_output(
- dc->links[i]->link_enc, signal, dc->links[i]);
+ dc->links[i]->link_enc, signal);
  }
 }
 
@@ -2513,6 +2515,10 @@ static void init_hw(struct dc *dc)
  * required signal (which may be different from the
  * default signal on connector). */
  struct dc_link *link = dc->links[i];
+
+ if (link->link_enc->connector.id == CONNECTOR_ID_EDP)
+ dc->hwss.edp_power_control(link, true);
+
  link->link_enc->funcs->hw_init(link->link_enc);
  }
 
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
index 4d72bb99be93..2dd6ac637572 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
@@ -70,8 +70,8 @@ uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
 void dp_receiver_power_ctrl(struct dc_link *link, bool on);
 
 void hwss_edp_power_control(
- struct link_encoder *enc,
- bool power_up);
+ struct dc_link *link,
+ bool power_up);
 
 void hwss_edp_backlight_control(
  struct dc_link *link,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index cc44ce591900..7009b4ab321e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -919,6 +919,9 @@ static void dcn10_init_hw(struct dc *dc)
  */
  struct dc_link *link = dc->links[i];
 
+ if (link->link_enc->connector.id == CONNECTOR_ID_EDP)
+ dc->hwss.edp_power_control(link, true);
+
  link->link_enc->funcs->hw_init(link->link_enc);
  }
 
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
index 498b7f05c5ca..0fd329deacd8 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
@@ -133,7 +133,7 @@ struct link_encoder_funcs {
  const struct dc_link_settings *link_settings,
  enum clock_source_id clock_source);
  void (*disable_output)(struct link_encoder *link_enc,
- enum signal_type signal, struct dc_link *link);
+ enum signal_type signal);
  void (*dp_set_lane_settings)(struct link_encoder *enc,
  const struct link_training_settings *link_settings);
  void (*dp_set_phy_pattern)(struct link_encoder *enc,
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 8734689a9245..859521d6fc1c 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -179,7 +179,7 @@ struct hw_sequencer_funcs {
  void (*ready_shared_resources)(struct dc *dc, struct dc_state *context);
  void (*optimize_shared_resources)(struct dc *dc);
  void (*edp_power_control)(
- struct link_encoder *enc,
+ struct dc_link *link,
  bool enable);
  void (*edp_backlight_control)(
  struct dc_link *link,
diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_encoder.c b/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_encoder.c
index 88c2bde3f039..57a54a7b89e5 100644
--- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_link_encoder.c
@@ -58,8 +58,7 @@ static void virtual_link_encoder_enable_dp_mst_output(
 
 static void virtual_link_encoder_disable_output(
  struct link_encoder *link_enc,
- enum signal_type signal,
- struct dc_link *link) {}
+ enum signal_type signal) {}
 
 static void virtual_link_encoder_dp_set_lane_settings(
  struct link_encoder *enc,
--
2.20.1


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[PATCHv2 2/6][SRU][Bionic] drm/amd/display: Move wait for hpd ready out from edp power control.

Dan Streetman
In reply to this post by Dan Streetman
From: Yongqiang Sun <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1814308

It may take over 200ms for wait hpd ready. To optimize the resume time,
we can power on eDP in init_hw, wait for hpd ready when doing link
training.

also create separate eDP enable function to make sure eDP is powered up
before doing and DPCD access, as HPD low will result in DPDC transaction
failure.

After optimization,
setpowerstate 145ms -> 9.8ms,
DPMS 387ms -> 18.9ms

Signed-off-by: Yongqiang Sun <[hidden email]>
Signed-off-by: Tony Cheng <[hidden email]>
Reviewed-by: Tony Cheng <[hidden email]>
Acked-by: Harry Wentland <[hidden email]>
Signed-off-by: Alex Deucher <[hidden email]>
(cherry picked from commit 904623ee5936e2226009b2f238f28781aecd2565)
Signed-off-by: Dan Streetman <[hidden email]>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 25 ++++++++++++++++++-
 .../drm/amd/display/dc/core/dc_link_hwss.c    | 11 +-------
 .../drm/amd/display/dc/dce/dce_link_encoder.c | 15 -----------
 .../display/dc/dce110/dce110_hw_sequencer.c   | 16 +++---------
 .../display/dc/dce110/dce110_hw_sequencer.h   |  4 +++
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  3 ++-
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  2 ++
 7 files changed, 37 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 2bcd19328329..6ed074b5fa46 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1271,6 +1271,24 @@ static enum dc_status enable_link_dp(
  return status;
 }
 
+static enum dc_status enable_link_edp(
+ struct dc_state *state,
+ struct pipe_ctx *pipe_ctx)
+{
+ enum dc_status status;
+ struct dc_stream_state *stream = pipe_ctx->stream;
+ struct dc_link *link = stream->sink->link;
+
+ link->dc->hwss.edp_power_control(link, true);
+ link->dc->hwss.edp_wait_for_hpd_ready(link, true);
+
+ status = enable_link_dp(state, pipe_ctx);
+
+ link->dc->hwss.edp_backlight_control(link, true);
+
+ return status;
+}
+
 static enum dc_status enable_link_dp_mst(
  struct dc_state *state,
  struct pipe_ctx *pipe_ctx)
@@ -1746,9 +1764,11 @@ static enum dc_status enable_link(
  enum dc_status status = DC_ERROR_UNEXPECTED;
  switch (pipe_ctx->stream->signal) {
  case SIGNAL_TYPE_DISPLAY_PORT:
- case SIGNAL_TYPE_EDP:
  status = enable_link_dp(state, pipe_ctx);
  break;
+ case SIGNAL_TYPE_EDP:
+ status = enable_link_edp(state, pipe_ctx);
+ break;
  case SIGNAL_TYPE_DISPLAY_PORT_MST:
  status = enable_link_dp_mst(state, pipe_ctx);
  msleep(200);
@@ -2420,6 +2440,9 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
  if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
  deallocate_mst_payload(pipe_ctx);
 
+ if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP)
+ core_dc->hwss.edp_backlight_control(pipe_ctx->stream->sink->link, false);
+
  core_dc->hwss.disable_stream(pipe_ctx, option);
 
  disable_link(pipe_ctx->stream->sink->link, pipe_ctx->stream->signal);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index f2902569be2e..2096f2a179f2 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -88,15 +88,7 @@ void dp_enable_link_phy(
  }
 
  if (dc_is_dp_sst_signal(signal)) {
- if (signal == SIGNAL_TYPE_EDP) {
- link->dc->hwss.edp_power_control(link, true);
- link_enc->funcs->enable_dp_output(
- link_enc,
- link_settings,
- clock_source);
- link->dc->hwss.edp_backlight_control(link, true);
- } else
- link_enc->funcs->enable_dp_output(
+ link_enc->funcs->enable_dp_output(
  link_enc,
  link_settings,
  clock_source);
@@ -138,7 +130,6 @@ void dp_disable_link_phy(struct dc_link *link, enum signal_type signal)
  dp_receiver_power_ctrl(link, false);
 
  if (signal == SIGNAL_TYPE_EDP) {
- link->dc->hwss.edp_backlight_control(link, false);
  edp_receiver_ready_T9(link);
  link->link_enc->funcs->disable_output(link->link_enc, signal);
  link->dc->hwss.edp_power_control(link, false);
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
index e0e50f9005d6..d886328f2b9c 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -1082,21 +1082,6 @@ void dce110_link_encoder_disable_output(
  /* disable encoder */
  if (dc_is_dp_signal(signal))
  link_encoder_disable(enc110);
-
- /*
- * TODO: Power control cause regression, we should implement
- * it properly, for now just comment it.
- */
-// if (enc110->base.connector.id == CONNECTOR_ID_EDP) {
-// /* power down eDP panel */
-// link_encoder_edp_wait_for_hpd_ready(
-// enc,
-// enc->connector,
-// false);
-//
-// link_encoder_edp_power_control(
-// enc, false);
-// }
 }
 
 void dce110_link_encoder_dp_set_lane_settings(
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 97dfe9e2f1ac..21df1a7aa681 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -924,8 +924,6 @@ void hwss_edp_power_control(
  "%s: Skipping Panel Power action: %s\n",
  __func__, (power_up ? "On":"Off"));
  }
-
- hwss_edp_wait_for_hpd_ready(link, true);
 }
 
 /*todo: cloned in stream enc, fix*/
@@ -1026,11 +1024,9 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option)
  }
 
  /* blank at encoder level */
- if (dc_is_dp_signal(pipe_ctx->stream->signal)) {
- if (pipe_ctx->stream->sink->link->connector_signal == SIGNAL_TYPE_EDP)
- hwss_edp_backlight_control(link, false);
+ if (dc_is_dp_signal(pipe_ctx->stream->signal))
  pipe_ctx->stream_res.stream_enc->funcs->dp_blank(pipe_ctx->stream_res.stream_enc);
- }
+
  link->link_enc->funcs->connect_dig_be_to_fe(
  link->link_enc,
  pipe_ctx->stream_res.stream_enc->id,
@@ -1042,15 +1038,12 @@ void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
  struct dc_link_settings *link_settings)
 {
  struct encoder_unblank_param params = { { 0 } };
- struct dc_link *link = pipe_ctx->stream->sink->link;
 
  /* only 3 items below are used by unblank */
  params.pixel_clk_khz =
  pipe_ctx->stream->timing.pix_clk_khz;
  params.link_settings.link_rate = link_settings->link_rate;
  pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, &params);
- if (link->connector_signal == SIGNAL_TYPE_EDP)
- hwss_edp_backlight_control(link, true);
 }
 
 
@@ -1396,10 +1389,8 @@ static void power_down_encoders(struct dc *dc)
 
  if (!dc->links[i]->wa_flags.dp_keep_receiver_powered)
  dp_receiver_power_ctrl(dc->links[i], false);
- if (connector_id == CONNECTOR_ID_EDP) {
+ if (connector_id == CONNECTOR_ID_EDP)
  signal = SIGNAL_TYPE_EDP;
- hwss_edp_backlight_control(dc->links[i], false);
- }
  }
 
  dc->links[i]->link_enc->funcs->disable_output(
@@ -3004,6 +2995,7 @@ static const struct hw_sequencer_funcs dce110_funcs = {
  .optimize_shared_resources = optimize_shared_resources,
  .edp_backlight_control = hwss_edp_backlight_control,
  .edp_power_control = hwss_edp_power_control,
+ .edp_wait_for_hpd_ready = hwss_edp_wait_for_hpd_ready,
 };
 
 void dce110_hw_sequencer_construct(struct dc *dc)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
index 2dd6ac637572..fc637647f643 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
@@ -77,5 +77,9 @@ void hwss_edp_backlight_control(
  struct dc_link *link,
  bool enable);
 
+void hwss_edp_wait_for_hpd_ready(
+ struct dc_link *link,
+ bool power_up);
+
 #endif /* __DC_HWSS_DCE110_H__ */
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 7009b4ab321e..cf09afc21d1e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2976,7 +2976,8 @@ static const struct hw_sequencer_funcs dcn10_funcs = {
  .ready_shared_resources = ready_shared_resources,
  .optimize_shared_resources = optimize_shared_resources,
  .edp_backlight_control = hwss_edp_backlight_control,
- .edp_power_control = hwss_edp_power_control
+ .edp_power_control = hwss_edp_power_control,
+ .edp_wait_for_hpd_ready = hwss_edp_wait_for_hpd_ready,
 };
 
 
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 859521d6fc1c..a84f9ffe9777 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -184,6 +184,8 @@ struct hw_sequencer_funcs {
  void (*edp_backlight_control)(
  struct dc_link *link,
  bool enable);
+ void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
+
 };
 
 void color_space_to_black_color(
--
2.20.1


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[PATCHv2 3/6][SRU][Bionic] drm/amd/display: eDP sequence BL off first then DP blank.

Dan Streetman
In reply to this post by Dan Streetman
From: Charlene Liu <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1814308

Signed-off-by: Charlene Liu <[hidden email]>
Reviewed-by: Anthony Koo <[hidden email]>
Acked-by: Harry Wentland <[hidden email]>
Signed-off-by: Alex Deucher <[hidden email]>
(cherry picked from commit 41b497421a1f07ab99814da740984f907747120b)
Signed-off-by: Dan Streetman <[hidden email]>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c |  7 ++----
 .../drm/amd/display/dc/dce/dce_link_encoder.c |  3 +++
 .../display/dc/dce110/dce110_hw_sequencer.c   | 22 ++++++++++++++++++-
 .../display/dc/dce110/dce110_hw_sequencer.h   |  1 +
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  1 +
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  1 +
 6 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 6ed074b5fa46..e384902e70ce 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1279,13 +1279,12 @@ static enum dc_status enable_link_edp(
  struct dc_stream_state *stream = pipe_ctx->stream;
  struct dc_link *link = stream->sink->link;
 
+ /*in case it is not on*/
  link->dc->hwss.edp_power_control(link, true);
  link->dc->hwss.edp_wait_for_hpd_ready(link, true);
 
  status = enable_link_dp(state, pipe_ctx);
 
- link->dc->hwss.edp_backlight_control(link, true);
-
  return status;
 }
 
@@ -2428,7 +2427,6 @@ void core_link_enable_stream(
  if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
  allocate_mst_payload(pipe_ctx);
 
- if (dc_is_dp_signal(pipe_ctx->stream->signal))
  core_dc->hwss.unblank_stream(pipe_ctx,
  &pipe_ctx->stream->sink->link->cur_link_settings);
 }
@@ -2440,8 +2438,7 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
  if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
  deallocate_mst_payload(pipe_ctx);
 
- if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP)
- core_dc->hwss.edp_backlight_control(pipe_ctx->stream->sink->link, false);
+ core_dc->hwss.blank_stream(pipe_ctx);
 
  core_dc->hwss.disable_stream(pipe_ctx, option);
 
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
index d886328f2b9c..ed3f23e71d21 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -838,6 +838,9 @@ void dce110_link_encoder_hw_init(
  cntl.coherent = false;
  cntl.hpd_sel = enc110->base.hpd_source;
 
+ if (enc110->base.connector.id == CONNECTOR_ID_EDP)
+ cntl.signal = SIGNAL_TYPE_EDP;
+
  result = link_transmitter_control(enc110, &cntl);
 
  if (result != BP_RESULT_OK) {
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 21df1a7aa681..c1d4126acabd 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1038,12 +1038,31 @@ void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
  struct dc_link_settings *link_settings)
 {
  struct encoder_unblank_param params = { { 0 } };
+ struct dc_stream_state *stream = pipe_ctx->stream;
+ struct dc_link *link = stream->sink->link;
 
  /* only 3 items below are used by unblank */
  params.pixel_clk_khz =
  pipe_ctx->stream->timing.pix_clk_khz;
  params.link_settings.link_rate = link_settings->link_rate;
- pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, &params);
+
+ if (dc_is_dp_signal(pipe_ctx->stream->signal))
+ pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, &params);
+
+ if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP)
+ link->dc->hwss.edp_backlight_control(link, true);
+}
+void dce110_blank_stream(struct pipe_ctx *pipe_ctx)
+{
+ struct encoder_unblank_param params = { { 0 } };
+ struct dc_stream_state *stream = pipe_ctx->stream;
+ struct dc_link *link = stream->sink->link;
+
+ if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP)
+ link->dc->hwss.edp_backlight_control(link, false);
+
+ if (dc_is_dp_signal(pipe_ctx->stream->signal))
+ pipe_ctx->stream_res.stream_enc->funcs->dp_blank(pipe_ctx->stream_res.stream_enc);
 }
 
 
@@ -2978,6 +2997,7 @@ static const struct hw_sequencer_funcs dce110_funcs = {
  .enable_stream = dce110_enable_stream,
  .disable_stream = dce110_disable_stream,
  .unblank_stream = dce110_unblank_stream,
+ .blank_stream = dce110_blank_stream,
  .enable_display_pipe_clock_gating = enable_display_pipe_clock_gating,
  .enable_display_power_gating = dce110_enable_display_power_gating,
  .power_down_front_end = dce110_power_down_fe,
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
index fc637647f643..807699dbbad4 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
@@ -52,6 +52,7 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option);
 void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
  struct dc_link_settings *link_settings);
 
+void dce110_blank_stream(struct pipe_ctx *pipe_ctx);
 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx);
 
 void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index cf09afc21d1e..47895e4577f1 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2959,6 +2959,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = {
  .enable_stream = dce110_enable_stream,
  .disable_stream = dce110_disable_stream,
  .unblank_stream = dce110_unblank_stream,
+ .blank_stream = dce110_blank_stream,
  .enable_display_power_gating = dcn10_dummy_display_power_gating,
  .power_down_front_end = dcn10_power_down_fe,
  .power_on_front_end = dcn10_power_on_fe,
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index a84f9ffe9777..584d14e89f54 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -140,6 +140,7 @@ struct hw_sequencer_funcs {
  void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
  struct dc_link_settings *link_settings);
 
+ void (*blank_stream)(struct pipe_ctx *pipe_ctx);
  void (*pipe_control_lock)(
  struct dc *dc,
  struct pipe_ctx *pipe,
--
2.20.1


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[PATCHv2 4/6][SRU][Bionic] drm/amd/display: Fix unused variable compilation error

Dan Streetman
In reply to this post by Dan Streetman
From: "Leo (Sunpeng) Li" <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1814308

Fix:

drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dce110/dce110_hw_sequencer.c:
In function ‘dce110_blank_stream’:
drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dce110/dce110_hw_sequencer.c:1008:31:
error: unused variable ‘params’ [-Werror=unused-variable]
  struct encoder_unblank_param params = { { 0 } };

Signed-off-by: Leo (Sunpeng) Li <[hidden email]>
Reviewed-by: Wesley Chalmers <[hidden email]>
Acked-by: Harry Wentland <[hidden email]>
Signed-off-by: Alex Deucher <[hidden email]>
(cherry picked from commit 9557080196d7c328aa514d2303a2fd7a985c5c2d)
Signed-off-by: Dan Streetman <[hidden email]>
---
 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index c1d4126acabd..ecf0c2265675 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1054,7 +1054,6 @@ void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
 }
 void dce110_blank_stream(struct pipe_ctx *pipe_ctx)
 {
- struct encoder_unblank_param params = { { 0 } };
  struct dc_stream_state *stream = pipe_ctx->stream;
  struct dc_link *link = stream->sink->link;
 
--
2.20.1


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[PATCHv2 5/6][SRU][Bionic] drm/amd/display: Fix warning about misaligned code

Dan Streetman
In reply to this post by Dan Streetman
From: Harry Wentland <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1814308

Signed-off-by: Harry Wentland <[hidden email]>
Reviewed-by: Charlene Liu <[hidden email]>
Signed-off-by: Alex Deucher <[hidden email]>
(cherry picked from commit f3b72c7b00bd36773005e1bfea6b2bb558eb254f)
Signed-off-by: Dan Streetman <[hidden email]>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index e384902e70ce..ef637e78b9c4 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2427,8 +2427,8 @@ void core_link_enable_stream(
  if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
  allocate_mst_payload(pipe_ctx);
 
- core_dc->hwss.unblank_stream(pipe_ctx,
- &pipe_ctx->stream->sink->link->cur_link_settings);
+ core_dc->hwss.unblank_stream(pipe_ctx,
+ &pipe_ctx->stream->sink->link->cur_link_settings);
 }
 
 void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
--
2.20.1


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[PATCHv2 6/6][SRU][Bionic] drm/amd/display: Fix MST dp_blank REG_WAIT timeout

Dan Streetman
In reply to this post by Dan Streetman
From: "Jerry (Fangzhi) Zuo" <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1814308

Need to blank stream before deallocate MST payload.

[drm:generic_reg_wait [amdgpu]] *ERROR* REG_WAIT timeout 10us * 3000 tries - dce110_stream_encoder_dp_blank line:944
------------[ cut here ]------------
WARNING: CPU: 0 PID: 2201 at /var/lib/dkms/amdgpu/18.50-690240/build/amd/amdgpu/../display/dc/dc_helper.c:249 generic_reg_wait+0xe7/0x160 [amdgpu]
Call Trace:
 dce110_stream_encoder_dp_blank+0x11c/0x180 [amdgpu]
 core_link_disable_stream+0x40/0x230 [amdgpu]
 ? generic_reg_update_ex+0xdb/0x130 [amdgpu]
 dce110_reset_hw_ctx_wrap+0xb7/0x1f0 [amdgpu]
 dce110_apply_ctx_to_hw+0x30/0x430 [amdgpu]
 ? dce110_apply_ctx_for_surface+0x206/0x260 [amdgpu]
 dc_commit_state+0x2ba/0x4d0 [amdgpu]
 amdgpu_dm_atomic_commit_tail+0x297/0xd70 [amdgpu]
 ? amdgpu_bo_pin_restricted+0x58/0x260 [amdgpu]
 ? wait_for_completion_timeout+0x1f/0x120
 ? wait_for_completion_interruptible+0x1c/0x160
 commit_tail+0x3d/0x60 [drm_kms_helper]
 drm_atomic_helper_commit+0xf6/0x100 [drm_kms_helper]
 drm_atomic_connector_commit_dpms+0xe5/0xf0 [drm]
 drm_mode_obj_set_property_ioctl+0x14f/0x250 [drm]
 drm_mode_connector_property_set_ioctl+0x2e/0x40 [drm]
 drm_ioctl+0x1e0/0x430 [drm]
 ? drm_mode_connector_set_obj_prop+0x70/0x70 [drm]
 ? ep_read_events_proc+0xb0/0xb0
 ? ep_scan_ready_list.constprop.18+0x1e6/0x1f0
 ? timerqueue_add+0x52/0x80
 amdgpu_drm_ioctl+0x49/0x80 [amdgpu]
 do_vfs_ioctl+0x90/0x5f0
 SyS_ioctl+0x74/0x80
 do_syscall_64+0x74/0x140
 entry_SYSCALL_64_after_hwframe+0x3d/0xa2
---[ end trace 3ed7b77a97d60f72 ]---

Signed-off-by: Jerry (Fangzhi) Zuo <[hidden email]>
Reviewed-by: Hersen Wu <[hidden email]>
Acked-by: Harry Wentland <[hidden email]>
Acked-by: Alex Deucher <[hidden email]>
Tested-by: Lyude Paul <[hidden email]>
Signed-off-by: Alex Deucher <[hidden email]>
Cc: [hidden email]
(cherry picked from commit 8c9d90eebd23b6d40ddf4ce5df5ca2b932336a06)
Signed-off-by: Dan Streetman <[hidden email]>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index ef637e78b9c4..02dcb839e467 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2435,11 +2435,11 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
 {
  struct dc  *core_dc = pipe_ctx->stream->ctx->dc;
 
+ core_dc->hwss.blank_stream(pipe_ctx);
+
  if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
  deallocate_mst_payload(pipe_ctx);
 
- core_dc->hwss.blank_stream(pipe_ctx);
-
  core_dc->hwss.disable_stream(pipe_ctx, option);
 
  disable_link(pipe_ctx->stream->sink->link, pipe_ctx->stream->signal);
--
2.20.1


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ACK/Cmnt: [PATCHv2 0/6][SRU][Bionic] amdgpu with mst WARNING on blanking

Stefan Bader-2
In reply to this post by Dan Streetman
On 11.02.19 14:31, Dan Streetman wrote:

> From: Dan Streetman <[hidden email]>
>
> This series fixes amdgpu screen blanking when using displayport monitors
> in MST configuration (i.e. displayport "daisy chaining").
>
> Note that the amdgpu driver, and DP MST, appears to be quite problematic,
> even upstream, and this patchset doesn't appear to fix all paths that
> lead to this WARNING being issued (and/or other amdgpu problems/failures).
> However it does appear to correct the simple case of this warning being
> issued (sometimes along with more serious failures) for each screen
> blanking/unblanking.
>
> This is changed from the v1 series by adding 3 more patches so all
> are complete cherry-picks, with no backporting (other than minor
> context differences) required.
>
> Andrew Jiang (1):
>   drm/amd/display: Don't use dc_link in link_encoder
>
> Charlene Liu (1):
>   drm/amd/display: eDP sequence BL off first then DP blank.
>
> Harry Wentland (1):
>   drm/amd/display: Fix warning about misaligned code
>
> Jerry (Fangzhi) Zuo (1):
>   drm/amd/display: Fix MST dp_blank REG_WAIT timeout
>
> Leo (Sunpeng) Li (1):
>   drm/amd/display: Fix unused variable compilation error
>
> Yongqiang Sun (1):
>   drm/amd/display: Move wait for hpd ready out from edp power control.
>
>  drivers/gpu/drm/amd/display/dc/core/dc_link.c | 30 ++++++--
>  .../drm/amd/display/dc/core/dc_link_hwss.c    | 20 ++---
>  .../drm/amd/display/dc/dce/dce_link_encoder.c | 24 +-----
>  .../drm/amd/display/dc/dce/dce_link_encoder.h |  5 +-
>  .../display/dc/dce110/dce110_hw_sequencer.c   | 73 ++++++++++++-------
>  .../display/dc/dce110/dce110_hw_sequencer.h   |  9 ++-
>  .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  7 +-
>  .../drm/amd/display/dc/inc/hw/link_encoder.h  |  2 +-
>  .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  5 +-
>  .../display/dc/virtual/virtual_link_encoder.c |  3 +-
>  10 files changed, 100 insertions(+), 78 deletions(-)
>
I don't dare to push back on this again as it seems to become bigger every time
it comes back. We need to be carefully watching for regressions there next cycle
(I added some reminder).

Acked-by: Stefan Bader <[hidden email]>



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ACK: [PATCHv2 0/6][SRU][Bionic] amdgpu with mst WARNING on blanking

Kleber Souza
In reply to this post by Dan Streetman
On 2/11/19 2:31 PM, Dan Streetman wrote:

> From: Dan Streetman <[hidden email]>
>
> This series fixes amdgpu screen blanking when using displayport monitors
> in MST configuration (i.e. displayport "daisy chaining").
>
> Note that the amdgpu driver, and DP MST, appears to be quite problematic,
> even upstream, and this patchset doesn't appear to fix all paths that
> lead to this WARNING being issued (and/or other amdgpu problems/failures).
> However it does appear to correct the simple case of this warning being
> issued (sometimes along with more serious failures) for each screen
> blanking/unblanking.
>
> This is changed from the v1 series by adding 3 more patches so all
> are complete cherry-picks, with no backporting (other than minor
> context differences) required.
>
> Andrew Jiang (1):
>   drm/amd/display: Don't use dc_link in link_encoder
>
> Charlene Liu (1):
>   drm/amd/display: eDP sequence BL off first then DP blank.
>
> Harry Wentland (1):
>   drm/amd/display: Fix warning about misaligned code
>
> Jerry (Fangzhi) Zuo (1):
>   drm/amd/display: Fix MST dp_blank REG_WAIT timeout
>
> Leo (Sunpeng) Li (1):
>   drm/amd/display: Fix unused variable compilation error
>
> Yongqiang Sun (1):
>   drm/amd/display: Move wait for hpd ready out from edp power control.
>
>  drivers/gpu/drm/amd/display/dc/core/dc_link.c | 30 ++++++--
>  .../drm/amd/display/dc/core/dc_link_hwss.c    | 20 ++---
>  .../drm/amd/display/dc/dce/dce_link_encoder.c | 24 +-----
>  .../drm/amd/display/dc/dce/dce_link_encoder.h |  5 +-
>  .../display/dc/dce110/dce110_hw_sequencer.c   | 73 ++++++++++++-------
>  .../display/dc/dce110/dce110_hw_sequencer.h   |  9 ++-
>  .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  7 +-
>  .../drm/amd/display/dc/inc/hw/link_encoder.h  |  2 +-
>  .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  5 +-
>  .../display/dc/virtual/virtual_link_encoder.c |  3 +-
>  10 files changed, 100 insertions(+), 78 deletions(-)
>

Acked-by: Kleber Sacilotto de Souza <[hidden email]>


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APPLIED: [PATCHv2 0/6][SRU][Bionic] amdgpu with mst WARNING on blanking

Kleber Souza
In reply to this post by Dan Streetman
On 2/11/19 2:31 PM, Dan Streetman wrote:

> From: Dan Streetman <[hidden email]>
>
> This series fixes amdgpu screen blanking when using displayport monitors
> in MST configuration (i.e. displayport "daisy chaining").
>
> Note that the amdgpu driver, and DP MST, appears to be quite problematic,
> even upstream, and this patchset doesn't appear to fix all paths that
> lead to this WARNING being issued (and/or other amdgpu problems/failures).
> However it does appear to correct the simple case of this warning being
> issued (sometimes along with more serious failures) for each screen
> blanking/unblanking.
>
> This is changed from the v1 series by adding 3 more patches so all
> are complete cherry-picks, with no backporting (other than minor
> context differences) required.
>
> Andrew Jiang (1):
>   drm/amd/display: Don't use dc_link in link_encoder
>
> Charlene Liu (1):
>   drm/amd/display: eDP sequence BL off first then DP blank.
>
> Harry Wentland (1):
>   drm/amd/display: Fix warning about misaligned code
>
> Jerry (Fangzhi) Zuo (1):
>   drm/amd/display: Fix MST dp_blank REG_WAIT timeout
>
> Leo (Sunpeng) Li (1):
>   drm/amd/display: Fix unused variable compilation error
>
> Yongqiang Sun (1):
>   drm/amd/display: Move wait for hpd ready out from edp power control.
>
>  drivers/gpu/drm/amd/display/dc/core/dc_link.c | 30 ++++++--
>  .../drm/amd/display/dc/core/dc_link_hwss.c    | 20 ++---
>  .../drm/amd/display/dc/dce/dce_link_encoder.c | 24 +-----
>  .../drm/amd/display/dc/dce/dce_link_encoder.h |  5 +-
>  .../display/dc/dce110/dce110_hw_sequencer.c   | 73 ++++++++++++-------
>  .../display/dc/dce110/dce110_hw_sequencer.h   |  9 ++-
>  .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |  7 +-
>  .../drm/amd/display/dc/inc/hw/link_encoder.h  |  2 +-
>  .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |  5 +-
>  .../display/dc/virtual/virtual_link_encoder.c |  3 +-
>  10 files changed, 100 insertions(+), 78 deletions(-)
>
Applied to bionic/master-next branch.

Thanks,
Kleber


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