[SRU] [B/D/E/Unstable/OEM-B/OEM-OSP1-B] [PATCH 0/2] Disable unreliable HPET on CFL/ICL systems

[Kai-Heng Feng]

BugLink: https://bugs.launchpad.net/bugs/1840239

[Impact]
TSC marked unstable by skewed HPET after Intel SoC reached PC10 state.

[Fix]
Disable HPET on affected SoC generations, currently happens to CFL and
ICL.

[Test]
I can confirm disabling HPET can avoid this issue.

[Regression Potential]
Low. TSC on recent Intel SoC is now an invariant clocksource, so it's
harmless to disable HPET on these platforms.

Kai-Heng Feng (2):
  UBUNTU: SAUCE: x86/intel: Disable HPET on Intel Coffe Lake platforms
  UBUNTU: SAUCE: x86/intel: Disable HPET on Intel Ice Lake platforms

 arch/x86/kernel/early-quirks.c | 4 ++++
 1 file changed, 4 insertions(+)

--
2.17.1


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[Kai-Heng Feng]

BugLink: https://bugs.launchpad.net/bugs/1840239

Some Coffee Lake platforms have skewed HPET timer once the SoCs entered
PC10, and marked TSC as unstable clocksource as result.

Harry Pan identified it's a firmware bug [1].

To prevent creating a circular dependency between HPET and TSC, let's
disable HPET on affected platforms.

[1]: https://lore.kernel.org/lkml/20190516090651.1396-1-harry.pan@.../
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183

Signed-off-by: Kai-Heng Feng <[hidden email]>
---
 arch/x86/kernel/early-quirks.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 58291692aaec..fc9554a799e5 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -741,6 +741,8 @@ static struct chipset early_qrk[] __initdata = {
  */
  { PCI_VENDOR_ID_INTEL, 0x0f00,
  PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
+ { PCI_VENDOR_ID_INTEL, 0x3ec4,
+ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
  { PCI_VENDOR_ID_BROADCOM, 0x4331,
   PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
  { PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, early_pci_clear_msi},
--
2.17.1


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[Kai-Heng Feng]

BugLink: https://bugs.launchpad.net/bugs/1840239

Ice Lake platform have similar behavior as Coffee Lake, have skewed HPET
timer once the SoCs entered PC10 so let's disable HPET on Ice Lake.
as result.

Signed-off-by: Kai-Heng Feng <[hidden email]>
---
 arch/x86/kernel/early-quirks.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index fc9554a799e5..a4b289fdc509 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -743,6 +743,8 @@ static struct chipset early_qrk[] __initdata = {
  PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
  { PCI_VENDOR_ID_INTEL, 0x3ec4,
  PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
+ { PCI_VENDOR_ID_INTEL, 0x8a12,
+ PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
  { PCI_VENDOR_ID_BROADCOM, 0x4331,
   PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
  { PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, early_pci_clear_msi},
--
2.17.1


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[AceLan Kao]

Acked-By: AceLan Kao <[hidden email]>

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[Seth Forshee]

On Wed, Oct 30, 2019 at 10:01:47PM +0800, Kai-Heng Feng wrote:

> BugLink: https://bugs.launchpad.net/bugs/1840239
>
> [Impact]
> TSC marked unstable by skewed HPET after Intel SoC reached PC10 state.
>
> [Fix]
> Disable HPET on affected SoC generations, currently happens to CFL and
> ICL.
>
> [Test]
> I can confirm disabling HPET can avoid this issue.
>
> [Regression Potential]
> Low. TSC on recent Intel SoC is now an invariant clocksource, so it's
> harmless to disable HPET on these platforms.

Acked-by: Seth Forshee <[hidden email]>

Applied to unstable/master, thanks!

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[Khaled Elmously]

On 2019-10-30 22:01:47 , Kai-Heng Feng wrote:

> BugLink: https://bugs.launchpad.net/bugs/1840239
>
> [Impact]
> TSC marked unstable by skewed HPET after Intel SoC reached PC10 state.
>
> [Fix]
> Disable HPET on affected SoC generations, currently happens to CFL and
> ICL.
>
> [Test]
> I can confirm disabling HPET can avoid this issue.
>
> [Regression Potential]
> Low. TSC on recent Intel SoC is now an invariant clocksource, so it's
> harmless to disable HPET on these platforms.
>
> Kai-Heng Feng (2):
>   UBUNTU: SAUCE: x86/intel: Disable HPET on Intel Coffe Lake platforms
>   UBUNTU: SAUCE: x86/intel: Disable HPET on Intel Ice Lake platforms
>
>  arch/x86/kernel/early-quirks.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> --
> 2.17.1
>
>
> --
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[You-Sheng Yang]

Please also apply
https://lists.ubuntu.com/archives/kernel-team/2019-November/105289.html
or it may cause regression.

On 2019-11-12 12:00, Khaled Elmously wrote:

> On 2019-10-30 22:01:47 , Kai-Heng Feng  wrote:
>> BugLink: https://bugs.launchpad.net/bugs/1840239
>>
>> [Impact]
>> TSC marked unstable by skewed HPET after Intel SoC reached PC10 state.
>>
>> [Fix]
>> Disable HPET on affected SoC generations, currently happens to CFL and
>> ICL.
>>
>> [Test]
>> I can confirm disabling HPET can avoid this issue.
>>
>> [Regression Potential]
>> Low. TSC on recent Intel SoC is now an invariant clocksource, so it's
>> harmless to disable HPET on these platforms.
>>
>> Kai-Heng Feng (2):
>>   UBUNTU: SAUCE: x86/intel: Disable HPET on Intel Coffe Lake platforms
>>   UBUNTU: SAUCE: x86/intel: Disable HPET on Intel Ice Lake platforms
>>
>>  arch/x86/kernel/early-quirks.c | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> --
>> 2.17.1
>>
>>
>> --
>> kernel-team mailing list
>> [hidden email]
>> https://lists.ubuntu.com/mailman/listinfo/kernel-team
>

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