On Wed, Oct 30, 2019 at 10:01:47PM +0800, Kai-Heng Feng wrote:
> BugLink: https://bugs.launchpad.net/bugs/1840239 >
> TSC marked unstable by skewed HPET after Intel SoC reached PC10 state.
> Disable HPET on affected SoC generations, currently happens to CFL and
> I can confirm disabling HPET can avoid this issue.
> [Regression Potential]
> Low. TSC on recent Intel SoC is now an invariant clocksource, so it's
> harmless to disable HPET on these platforms.