[SRU][B][D][Patch 0/2] Enhanced hardware support (LP: 1836857)

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[SRU][B][D][Patch 0/2] Enhanced hardware support (LP: 1836857)

frank.heimes
Buglink: https://bugs.launchpad.net/bugs/1836857

SRU Justification:

[Impact]

* Enhanced hardware support for upcoming machine and make sure it can report new CPU capabilities

[Fix]

* a8fd61688dfad6fdce95fa64cacd8a66595697b8 a8fd616 "s390: report new CPU capabilities"

* 142c52d7bce45d335f48d53fdbf428bb15cf3924 142c52d "s390: add alignment hints to vector load and store"

[Test Case]

* check /proc/cpuinfo in bionic running on upcoming machine - currently only IBM can do that

[Regression Potential]

* The regression potential can be considered as very low since these changes are limited to arch/s390

* and mainly adds code for the capability to report new features in cpuinfo - in case of running on new hardware

[Other Info]

* a8fd616 got upstream accepted with 5.2; 142c52d with 5.1 - hence both are already in eoan

Martin Schwidefsky (2):
  From: Martin Schwidefsky <[hidden email]>
  From: Martin Schwidefsky <[hidden email]>

 arch/s390/include/asm/elf.h     | 4 ++++
 arch/s390/include/asm/vx-insn.h | 8 ++++----
 arch/s390/kernel/processor.c    | 3 ++-
 arch/s390/kernel/setup.c        | 8 ++++++++
 4 files changed, 18 insertions(+), 5 deletions(-)

--
2.7.4


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[SRU][B][D][Patch 1/2] s390: report new CPU capabilities

frank.heimes
From: Martin Schwidefsky <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1836857

Add hardware capability bits and features tags to /proc/cpuinfo
for 4 new CPU features:
  "Vector-Enhancements Facility 2" (tag "vxe2", hwcap 2^15)
  "Vector-Packed-Decimal-Enhancement Facility" (tag "vxp", hwcap 2^16)
  "Enhanced-Sort Facility" (tag "sort", hwcap 2^17)
  "Deflate-Conversion Facility" (tag "dflt", hwcap 2^18)

Reviewed-by: Heiko Carstens <[hidden email]>
Signed-off-by: Martin Schwidefsky <[hidden email]>
(cherry picked from commit a8fd61688dfad6fdce95fa64cacd8a66595697b8)
Signed-off-by: Frank Heimes <[hidden email]>
---
 arch/s390/include/asm/elf.h  | 4 ++++
 arch/s390/kernel/processor.c | 3 ++-
 arch/s390/kernel/setup.c     | 8 ++++++++
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index 1a61b1b..dc5d3e3 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -107,6 +107,10 @@
 #define HWCAP_S390_VXRS_BCD 4096
 #define HWCAP_S390_VXRS_EXT 8192
 #define HWCAP_S390_GS 16384
+#define HWCAP_S390_VXRS_EXT2 32768
+#define HWCAP_S390_VXRS_PDE 65536
+#define HWCAP_S390_SORT 131072
+#define HWCAP_S390_DFLT 262144
 
 /* Internal bits, not exposed via elf */
 #define HWCAP_INT_SIE 1UL
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
index 6fe2e18..5de1330 100644
--- a/arch/s390/kernel/processor.c
+++ b/arch/s390/kernel/processor.c
@@ -109,7 +109,8 @@ static void show_cpu_summary(struct seq_file *m, void *v)
 {
  static const char *hwcap_str[] = {
  "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
- "edat", "etf3eh", "highgprs", "te", "vx", "vxd", "vxe", "gs"
+ "edat", "etf3eh", "highgprs", "te", "vx", "vxd", "vxe", "gs",
+ "vxe2", "vxp", "sort", "dflt"
  };
  static const char * const int_hwcap_str[] = {
  "sie"
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index c69f3a3..473c85c 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -778,7 +778,15 @@ static int __init setup_hwcaps(void)
  elf_hwcap |= HWCAP_S390_VXRS_EXT;
  if (test_facility(135))
  elf_hwcap |= HWCAP_S390_VXRS_BCD;
+ if (test_facility(148))
+ elf_hwcap |= HWCAP_S390_VXRS_EXT2;
+ if (test_facility(152))
+ elf_hwcap |= HWCAP_S390_VXRS_PDE;
  }
+ if (test_facility(150))
+ elf_hwcap |= HWCAP_S390_SORT;
+ if (test_facility(151))
+ elf_hwcap |= HWCAP_S390_DFLT;
 
  /*
  * Guarded storage support HWCAP_S390_GS is bit 12.
--
2.7.4


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[SRU][B][D][Patch 2/2] s390: add alignment hints to vector load and store

frank.heimes
In reply to this post by frank.heimes
From: Martin Schwidefsky <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1836857

The z14 introduced alignment hints to increase the performance of
vector loads and stores. The kernel uses an implicit alignmenet
of 8 bytes for the vector registers, set the alignment hint to 3.

Reviewed-by: Christian Borntraeger <[hidden email]>
Signed-off-by: Martin Schwidefsky <[hidden email]>
(cherry picked from commit 142c52d7bce45d335f48d53fdbf428bb15cf3924)
Signed-off-by: Frank Heimes <[hidden email]>
---
 arch/s390/include/asm/vx-insn.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/s390/include/asm/vx-insn.h b/arch/s390/include/asm/vx-insn.h
index 266a723..0c05a67 100644
--- a/arch/s390/include/asm/vx-insn.h
+++ b/arch/s390/include/asm/vx-insn.h
@@ -363,23 +363,23 @@
 .endm
 
 /* VECTOR LOAD MULTIPLE */
-.macro VLM vfrom, vto, disp, base
+.macro VLM vfrom, vto, disp, base, hint=3
  VX_NUM v1, \vfrom
  VX_NUM v3, \vto
  GR_NUM b2, \base    /* Base register */
  .word 0xE700 | ((v1&15) << 4) | (v3&15)
  .word (b2 << 12) | (\disp)
- MRXBOPC 0, 0x36, v1, v3
+ MRXBOPC \hint, 0x36, v1, v3
 .endm
 
 /* VECTOR STORE MULTIPLE */
-.macro VSTM vfrom, vto, disp, base
+.macro VSTM vfrom, vto, disp, base, hint=3
  VX_NUM v1, \vfrom
  VX_NUM v3, \vto
  GR_NUM b2, \base    /* Base register */
  .word 0xE700 | ((v1&15) << 4) | (v3&15)
  .word (b2 << 12) | (\disp)
- MRXBOPC 0, 0x3E, v1, v3
+ MRXBOPC \hint, 0x3E, v1, v3
 .endm
 
 /* VECTOR PERMUTE */
--
2.7.4


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ACK: [SRU][B][D][Patch 0/2] Enhanced hardware support (LP: 1836857)

Connor Kuehl
In reply to this post by frank.heimes
On 7/22/19 11:24 AM, [hidden email] wrote:

> Buglink: https://bugs.launchpad.net/bugs/1836857
>
> SRU Justification:
>
> [Impact]
>
> * Enhanced hardware support for upcoming machine and make sure it can report new CPU capabilities
>
> [Fix]
>
> * a8fd61688dfad6fdce95fa64cacd8a66595697b8 a8fd616 "s390: report new CPU capabilities"
>
> * 142c52d7bce45d335f48d53fdbf428bb15cf3924 142c52d "s390: add alignment hints to vector load and store"
>
> [Test Case]
>
> * check /proc/cpuinfo in bionic running on upcoming machine - currently only IBM can do that
>
> [Regression Potential]
>
> * The regression potential can be considered as very low since these changes are limited to arch/s390
>
> * and mainly adds code for the capability to report new features in cpuinfo - in case of running on new hardware
>
> [Other Info]
>
> * a8fd616 got upstream accepted with 5.2; 142c52d with 5.1 - hence both are already in eoan
>
> Martin Schwidefsky (2):
>   From: Martin Schwidefsky <[hidden email]>
>   From: Martin Schwidefsky <[hidden email]>
>
>  arch/s390/include/asm/elf.h     | 4 ++++
>  arch/s390/include/asm/vx-insn.h | 8 ++++----
>  arch/s390/kernel/processor.c    | 3 ++-
>  arch/s390/kernel/setup.c        | 8 ++++++++
>  4 files changed, 18 insertions(+), 5 deletions(-)
>

Acked-by: Connor Kuehl <[hidden email]>


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ACK: [SRU][B][D][Patch 0/2] Enhanced hardware support (LP: 1836857)

Stefan Bader-2
In reply to this post by frank.heimes
On 22.07.19 20:24, [hidden email] wrote:

> Buglink: https://bugs.launchpad.net/bugs/1836857
>
> SRU Justification:
>
> [Impact]
>
> * Enhanced hardware support for upcoming machine and make sure it can report new CPU capabilities
>
> [Fix]
>
> * a8fd61688dfad6fdce95fa64cacd8a66595697b8 a8fd616 "s390: report new CPU capabilities"
>
> * 142c52d7bce45d335f48d53fdbf428bb15cf3924 142c52d "s390: add alignment hints to vector load and store"
>
> [Test Case]
>
> * check /proc/cpuinfo in bionic running on upcoming machine - currently only IBM can do that
>
> [Regression Potential]
>
> * The regression potential can be considered as very low since these changes are limited to arch/s390
>
> * and mainly adds code for the capability to report new features in cpuinfo - in case of running on new hardware
>
> [Other Info]
>
> * a8fd616 got upstream accepted with 5.2; 142c52d with 5.1 - hence both are already in eoan
>
> Martin Schwidefsky (2):
>   From: Martin Schwidefsky <[hidden email]>
>   From: Martin Schwidefsky <[hidden email]>
>
>  arch/s390/include/asm/elf.h     | 4 ++++
>  arch/s390/include/asm/vx-insn.h | 8 ++++----
>  arch/s390/kernel/processor.c    | 3 ++-
>  arch/s390/kernel/setup.c        | 8 ++++++++
>  4 files changed, 18 insertions(+), 5 deletions(-)
>
Acked-by: Stefan Bader <[hidden email]>


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APPLIED: [SRU][B][D][Patch 0/2] Enhanced hardware support (LP: 1836857)

Khaled Elmously
In reply to this post by frank.heimes
On 2019-07-22 20:24:32 , [hidden email] wrote:

> Buglink: https://bugs.launchpad.net/bugs/1836857
>
> SRU Justification:
>
> [Impact]
>
> * Enhanced hardware support for upcoming machine and make sure it can report new CPU capabilities
>
> [Fix]
>
> * a8fd61688dfad6fdce95fa64cacd8a66595697b8 a8fd616 "s390: report new CPU capabilities"
>
> * 142c52d7bce45d335f48d53fdbf428bb15cf3924 142c52d "s390: add alignment hints to vector load and store"
>
> [Test Case]
>
> * check /proc/cpuinfo in bionic running on upcoming machine - currently only IBM can do that
>
> [Regression Potential]
>
> * The regression potential can be considered as very low since these changes are limited to arch/s390
>
> * and mainly adds code for the capability to report new features in cpuinfo - in case of running on new hardware
>
> [Other Info]
>
> * a8fd616 got upstream accepted with 5.2; 142c52d with 5.1 - hence both are already in eoan
>
> Martin Schwidefsky (2):
>   From: Martin Schwidefsky <[hidden email]>
>   From: Martin Schwidefsky <[hidden email]>
>
>  arch/s390/include/asm/elf.h     | 4 ++++
>  arch/s390/include/asm/vx-insn.h | 8 ++++----
>  arch/s390/kernel/processor.c    | 3 ++-
>  arch/s390/kernel/setup.c        | 8 ++++++++
>  4 files changed, 18 insertions(+), 5 deletions(-)
>
> --
> 2.7.4
>
>
> --
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> [hidden email]
> https://lists.ubuntu.com/mailman/listinfo/kernel-team

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