[SRU][X/Y/Z/A][PATCH 0/1] nvme: Quirks for PM1725 controllers

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[SRU][X/Y/Z/A][PATCH 0/1] nvme: Quirks for PM1725 controllers

Kleber Souza
BugLink: http://bugs.launchpad.net/bugs/1704435

These patches are the backport from
d554b5e1ca64d23e4f839e6531490fee8479fbaf (nvme: Quirks for PM1725
controllers) to fix lp #1704435. The priority is Xenial, but it should be
applied for all series.

[SRU justification]
Pick up the following device quirk to resolve a hardware/firmware bug
affecting some NVMe drives that use the PM1725 controller. Under adverse
circumstances the bug can result in data corruption and loss.

Martin K. Petersen (1):
  nvme: Quirks for PM1725 controllers

 drivers/nvme/host/pci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

--
2.13.2


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[SRU][Xenial][PATCH] nvme: Quirks for PM1725 controllers

Kleber Souza
From: "Martin K. Petersen" <[hidden email]>

BugLink: http://bugs.launchpad.net/bugs/1704435

PM1725 controllers have a couple of quirks that need to be handled in
the driver:

 - I/O queue depth must be limited to 64 entries on controllers that do
   not report MQES.

 - The host interface registers go offline briefly while resetting the
   chip. Thus a delay is needed before checking whether the controller
   is ready.

Note that the admin queue depth is also limited to 64 on older versions
of this board. Since our NVME_AQ_DEPTH is now 32 that is no longer an
issue.

Signed-off-by: Martin K. Petersen <[hidden email]>
Signed-off-by: Sagi Grimberg <[hidden email]>
(backported from d554b5e1ca64d23e4f839e6531490fee8479fbaf)
Signed-off-by: Kleber Sacilotto de Souza <[hidden email]>
---
 drivers/nvme/host/pci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index b9cf5aa78753..1d6036286c5d 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1891,6 +1891,12 @@ static int nvme_pci_enable(struct nvme_dev *dev)
  dev_warn(dev->dev, "detected Apple NVMe controller, set "
  "queue depth=%u to work around controller resets\n",
  dev->q_depth);
+ } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&
+   (pdev->device == 0xa821 || pdev->device == 0xa822) &&
+   NVME_CAP_MQES(cap) == 0) {
+ dev->q_depth = 64;
+ dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, "
+                        "set queue depth=%u\n", dev->q_depth);
  }
 
  if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2))
@@ -2371,6 +2377,10 @@ static const struct pci_device_id nvme_id_table[] = {
  .driver_data = NVME_QUIRK_IDENTIFY_CNS, },
  { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */
  .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa821),   /* Samsung PM1725 */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa822),   /* Samsung PM1725a */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
  { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
  { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
  { 0, }
--
2.13.2


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[SRU][Yakkety][PATCH] nvme: Quirks for PM1725 controllers

Kleber Souza
In reply to this post by Kleber Souza
From: "Martin K. Petersen" <[hidden email]>

BugLink: http://bugs.launchpad.net/bugs/1704435

PM1725 controllers have a couple of quirks that need to be handled in
the driver:

 - I/O queue depth must be limited to 64 entries on controllers that do
   not report MQES.

 - The host interface registers go offline briefly while resetting the
   chip. Thus a delay is needed before checking whether the controller
   is ready.

Note that the admin queue depth is also limited to 64 on older versions
of this board. Since our NVME_AQ_DEPTH is now 32 that is no longer an
issue.

Signed-off-by: Martin K. Petersen <[hidden email]>
Signed-off-by: Sagi Grimberg <[hidden email]>
(backported from d554b5e1ca64d23e4f839e6531490fee8479fbaf)
Signed-off-by: Kleber Sacilotto de Souza <[hidden email]>
---
 drivers/nvme/host/pci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 2e61d3047435..f236f1eef37e 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1760,6 +1760,12 @@ static int nvme_pci_enable(struct nvme_dev *dev)
  dev_warn(dev->dev, "detected Apple NVMe controller, set "
  "queue depth=%u to work around controller resets\n",
  dev->q_depth);
+ } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&
+   (pdev->device == 0xa821 || pdev->device == 0xa822) &&
+   NVME_CAP_MQES(cap) == 0) {
+ dev->q_depth = 64;
+ dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, "
+                        "set queue depth=%u\n", dev->q_depth);
  }
 
  if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2))
@@ -2296,6 +2302,10 @@ static const struct pci_device_id nvme_id_table[] = {
  .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
  { PCI_DEVICE(0x1c5f, 0x0540), /* Memblaze Pblaze4 adapter */
  .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa821),   /* Samsung PM1725 */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa822),   /* Samsung PM1725a */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
  { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
  { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
  { 0, }
--
2.13.2


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[SRU][Zesty][PATCH] nvme: Quirks for PM1725 controllers

Kleber Souza
In reply to this post by Kleber Souza
From: "Martin K. Petersen" <[hidden email]>

BugLink: http://bugs.launchpad.net/bugs/1704435

PM1725 controllers have a couple of quirks that need to be handled in
the driver:

 - I/O queue depth must be limited to 64 entries on controllers that do
   not report MQES.

 - The host interface registers go offline briefly while resetting the
   chip. Thus a delay is needed before checking whether the controller
   is ready.

Note that the admin queue depth is also limited to 64 on older versions
of this board. Since our NVME_AQ_DEPTH is now 32 that is no longer an
issue.

Signed-off-by: Martin K. Petersen <[hidden email]>
Signed-off-by: Sagi Grimberg <[hidden email]>
(backported from d554b5e1ca64d23e4f839e6531490fee8479fbaf)
Signed-off-by: Kleber Sacilotto de Souza <[hidden email]>
---
 drivers/nvme/host/pci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 6b929466c286..63f04a64b83b 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1740,6 +1740,12 @@ static int nvme_pci_enable(struct nvme_dev *dev)
  dev_warn(dev->dev, "detected Apple NVMe controller, set "
  "queue depth=%u to work around controller resets\n",
  dev->q_depth);
+ } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&
+   (pdev->device == 0xa821 || pdev->device == 0xa822) &&
+   NVME_CAP_MQES(cap) == 0) {
+ dev->q_depth = 64;
+ dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, "
+                        "set queue depth=%u\n", dev->q_depth);
  }
 
  /*
@@ -2285,6 +2291,10 @@ static const struct pci_device_id nvme_id_table[] = {
  .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
  { PCI_DEVICE(0x1c5f, 0x0540), /* Memblaze Pblaze4 adapter */
  .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa821),   /* Samsung PM1725 */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa822),   /* Samsung PM1725a */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
  { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
  { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
  { 0, }
--
2.13.2


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[SRU][Artful][PATCH] nvme: Quirks for PM1725 controllers

Kleber Souza
In reply to this post by Kleber Souza
From: "Martin K. Petersen" <[hidden email]>

BugLink: http://bugs.launchpad.net/bugs/1704435

PM1725 controllers have a couple of quirks that need to be handled in
the driver:

 - I/O queue depth must be limited to 64 entries on controllers that do
   not report MQES.

 - The host interface registers go offline briefly while resetting the
   chip. Thus a delay is needed before checking whether the controller
   is ready.

Note that the admin queue depth is also limited to 64 on older versions
of this board. Since our NVME_AQ_DEPTH is now 32 that is no longer an
issue.

Signed-off-by: Martin K. Petersen <[hidden email]>
Signed-off-by: Sagi Grimberg <[hidden email]>
(backported from d554b5e1ca64d23e4f839e6531490fee8479fbaf)
Signed-off-by: Kleber Sacilotto de Souza <[hidden email]>
---
 drivers/nvme/host/pci.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 23c58872188c..2617ad532e15 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1747,6 +1747,12 @@ static int nvme_pci_enable(struct nvme_dev *dev)
  dev_warn(dev->dev, "detected Apple NVMe controller, set "
  "queue depth=%u to work around controller resets\n",
  dev->q_depth);
+ } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&
+   (pdev->device == 0xa821 || pdev->device == 0xa822) &&
+   NVME_CAP_MQES(cap) == 0) {
+ dev->q_depth = 64;
+ dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, "
+                        "set queue depth=%u\n", dev->q_depth);
  }
 
  /*
@@ -2328,6 +2334,10 @@ static const struct pci_device_id nvme_id_table[] = {
  .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
  { PCI_DEVICE(0x1c5f, 0x0540), /* Memblaze Pblaze4 adapter */
  .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa821),   /* Samsung PM1725 */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
+ { PCI_DEVICE(0x144d, 0xa822),   /* Samsung PM1725a */
+ .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
  { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
  { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
  { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) },
--
2.13.2


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ACK: [SRU][X/Y/Z/A][PATCH 0/1] nvme: Quirks for PM1725 controllers

Stefan Bader-2
In reply to this post by Kleber Souza
On 17.07.2017 09:33, Kleber Sacilotto de Souza wrote:

> BugLink: http://bugs.launchpad.net/bugs/1704435
>
> These patches are the backport from
> d554b5e1ca64d23e4f839e6531490fee8479fbaf (nvme: Quirks for PM1725
> controllers) to fix lp #1704435. The priority is Xenial, but it should be
> applied for all series.
>
> [SRU justification]
> Pick up the following device quirk to resolve a hardware/firmware bug
> affecting some NVMe drives that use the PM1725 controller. Under adverse
> circumstances the bug can result in data corruption and loss.
>
> Martin K. Petersen (1):
>   nvme: Quirks for PM1725 controllers
>
>  drivers/nvme/host/pci.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
Acked-by: Stefan Bader <[hidden email]>



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ACK / APPLIED[artful]: [SRU][X/Y/Z/A][PATCH 0/1] nvme: Quirks for PM1725 controllers

Seth Forshee
In reply to this post by Kleber Souza
On Mon, Jul 17, 2017 at 09:33:55AM +0200, Kleber Sacilotto de Souza wrote:

> BugLink: http://bugs.launchpad.net/bugs/1704435
>
> These patches are the backport from
> d554b5e1ca64d23e4f839e6531490fee8479fbaf (nvme: Quirks for PM1725
> controllers) to fix lp #1704435. The priority is Xenial, but it should be
> applied for all series.
>
> [SRU justification]
> Pick up the following device quirk to resolve a hardware/firmware bug
> affecting some NVMe drives that use the PM1725 controller. Under adverse
> circumstances the bug can result in data corruption and loss.

Acked-by: Seth Forshee <[hidden email]>

Applied patch for artful to artful/master-next and unstable/master-next,
thanks.

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APPLIED [X/Y/Z]: [SRU][X/Y/Z/A][PATCH 0/1] nvme: Quirks for PM1725 controllers

Kleber Souza
In reply to this post by Kleber Souza
Applied to the master-next branches of xenial, yakkety and zesty.

Thanks,
Kleber

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