[SRU][Xenial][PATCH 0/6] Fixups for CVE-2018-3639 (x86)

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[SRU][Xenial][PATCH 0/6] Fixups for CVE-2018-3639 (x86)

Juerg Haefliger
Misc subsequent fixups and cleanups for CVE-2018-3639 (x86).

Signed-off-by: Juerg Haefliger <[hidden email]>


Huaitong Han (1):
  KVM: x86: remove magic number with enum cpuid_leafs

Juerg Haefliger (5):
  UBUNTU: SAUCE: x86/cpufeatures: Move CPUID_7_EDX CPUID bits to word 18
  UBUNTU: SAUCE: x86: Remove double include
  UBUNTU: SAUCE: proc: Remove empty line in /proc/$pid/status
  UBUNTU: SAUCE: x86/pti: Evaluate X86_BUG_CPU_MELTDOWN when pti=auto
  UBUNTU: SAUCE: x86/speculation: Query individual feature flags when
    reloading microcode

 arch/x86/include/asm/cpufeature.h        | 10 ++++--
 arch/x86/include/asm/cpufeatures.h       | 12 +++----
 arch/x86/include/asm/disabled-features.h |  2 ++
 arch/x86/include/asm/mwait.h             |  1 -
 arch/x86/include/asm/required-features.h |  2 ++
 arch/x86/kernel/cpu/microcode/core.c     | 24 +++++++------
 arch/x86/kvm/cpuid.c                     | 44 ++++++++++++------------
 arch/x86/mm/kaiser.c                     |  7 ++--
 fs/proc/array.c                          |  2 +-
 9 files changed, 57 insertions(+), 47 deletions(-)

--
2.17.0


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[SRU][Xenial][PATCH 1/6] KVM: x86: remove magic number with enum cpuid_leafs

Juerg Haefliger
From: Huaitong Han <[hidden email]>

CVE-2018-3639 (x86)

This patch removes magic number with enum cpuid_leafs.

Signed-off-by: Huaitong Han <[hidden email]>
Signed-off-by: Paolo Bonzini <[hidden email]>
(backported from commit e0b18ef7189075676ac432954d7920eaa30d8e3e)
[juergh:- Context adjustments.]
Signed-off-by: Juerg Haefliger <[hidden email]>
---
 arch/x86/kvm/cpuid.c | 44 ++++++++++++++++++++++----------------------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index eae50e438ae5..5031f591e4bc 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -306,7 +306,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
 
  /* cpuid 1.edx */
- const u32 kvm_supported_word0_x86_features =
+ const u32 kvm_cpuid_1_edx_x86_features =
  F(FPU) | F(VME) | F(DE) | F(PSE) |
  F(TSC) | F(MSR) | F(PAE) | F(MCE) |
  F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
@@ -316,7 +316,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
  0 /* HTT, TM, Reserved, PBE */;
  /* cpuid 0x80000001.edx */
- const u32 kvm_supported_word1_x86_features =
+ const u32 kvm_cpuid_8000_0001_edx_x86_features =
  F(FPU) | F(VME) | F(DE) | F(PSE) |
  F(TSC) | F(MSR) | F(PAE) | F(MCE) |
  F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
@@ -326,7 +326,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
  0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
  /* cpuid 1.ecx */
- const u32 kvm_supported_word4_x86_features =
+ const u32 kvm_cpuid_1_ecx_x86_features =
  /* NOTE: MONITOR (and MWAIT) are emulated as NOP,
  * but *not* advertised to guests via CPUID ! */
  F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
@@ -338,20 +338,20 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
  F(F16C) | F(RDRAND);
  /* cpuid 0x80000001.ecx */
- const u32 kvm_supported_word6_x86_features =
+ const u32 kvm_cpuid_8000_0001_ecx_x86_features =
  F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
  F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
  F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
  0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
 
  /* cpuid 0xC0000001.edx */
- const u32 kvm_supported_word5_x86_features =
+ const u32 kvm_cpuid_C000_0001_edx_x86_features =
  F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
  F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
  F(PMM) | F(PMM_EN);
 
  /* cpuid 7.0.ebx */
- const u32 kvm_supported_word9_x86_features =
+ const u32 kvm_cpuid_7_0_ebx_x86_features =
  F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
  F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
  F(ADX) | F(SMAP) | F(AVX512F) | F(AVX512PF) | F(AVX512ER) |
@@ -362,7 +362,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  F(SPEC_CTRL) | F(SPEC_CTRL_SSBD);
 
  /* cpuid 0xD.1.eax */
- const u32 kvm_supported_word10_x86_features =
+ const u32 kvm_cpuid_D_1_eax_x86_features =
  F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
 
  /* cpuid 0x80000008.0.ebx */
@@ -385,10 +385,10 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  entry->eax = min(entry->eax, (u32)0xd);
  break;
  case 1:
- entry->edx &= kvm_supported_word0_x86_features;
- cpuid_mask(&entry->edx, 0);
- entry->ecx &= kvm_supported_word4_x86_features;
- cpuid_mask(&entry->ecx, 4);
+ entry->edx &= kvm_cpuid_1_edx_x86_features;
+ cpuid_mask(&entry->edx, CPUID_1_EDX);
+ entry->ecx &= kvm_cpuid_1_ecx_x86_features;
+ cpuid_mask(&entry->ecx, CPUID_1_ECX);
  /* we support x2apic emulation even if host does not support
  * it since we emulate x2apic in software */
  entry->ecx |= F(X2APIC);
@@ -442,12 +442,12 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  /* Mask ebx against host capability word 9 */
  if (index == 0) {
- entry->ebx &= kvm_supported_word9_x86_features;
- cpuid_mask(&entry->ebx, 9);
+ entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
+ cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
  // TSC_ADJUST is emulated
  entry->ebx |= F(TSC_ADJUST);
  entry->edx &= kvm_supported_7_0_edx_x86_features;
- cpuid_mask(&entry->edx, 16);
+ cpuid_mask(&entry->edx, CPUID_7_EDX);
  } else {
  entry->ebx = 0;
  entry->edx = 0;
@@ -526,8 +526,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
 
  do_cpuid_1_ent(&entry[i], function, idx);
  if (idx == 1) {
- entry[i].eax &= kvm_supported_word10_x86_features;
- cpuid_mask(&entry[i].eax, 10);
+ entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
+ cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
  entry[i].ebx = 0;
  if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
  entry[i].ebx =
@@ -577,10 +577,10 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  entry->eax = min(entry->eax, 0x8000001a);
  break;
  case 0x80000001:
- entry->edx &= kvm_supported_word1_x86_features;
- cpuid_mask(&entry->edx, 1);
- entry->ecx &= kvm_supported_word6_x86_features;
- cpuid_mask(&entry->ecx, 6);
+ entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
+ cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
+ entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
+ cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
  break;
  case 0x80000007: /* Advanced power management */
  /* invariant TSC is CPUID.80000007H:EDX[8] */
@@ -627,8 +627,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  entry->eax = min(entry->eax, 0xC0000004);
  break;
  case 0xC0000001:
- entry->edx &= kvm_supported_word5_x86_features;
- cpuid_mask(&entry->edx, 5);
+ entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
+ cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
  break;
  case 3: /* Processor serial number */
  case 5: /* MONITOR/MWAIT */
--
2.17.0


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[SRU][Xenial][PATCH 2/6] UBUNTU: SAUCE: x86/cpufeatures: Move CPUID_7_EDX CPUID bits to word 18

Juerg Haefliger
In reply to this post by Juerg Haefliger
CVE-2018-3639 (x86)

It's ok to have holes in CPU feature bits array, so move the CPUID_7_EDX
bits from word 16 to word 18 to match upstream. Primarily to avoid
confusion and conflicts with future backports/cherry-picks.

Fixes: e8e6c1d5c153 ("x86/cpufeatures: Add CPUID_7_EDX CPUID leaf")
Signed-off-by: Juerg Haefliger <[hidden email]>
---
 arch/x86/include/asm/cpufeature.h        | 10 ++++++++--
 arch/x86/include/asm/cpufeatures.h       | 12 ++++++------
 arch/x86/include/asm/disabled-features.h |  2 ++
 arch/x86/include/asm/required-features.h |  2 ++
 4 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index b28546a6005e..27d03fa990e0 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -26,6 +26,8 @@ enum cpuid_leafs
  CPUID_8000_0008_EBX,
  CPUID_6_EAX,
  CPUID_8000_000A_EDX,
+ CPUID_7_ECX,
+ CPUID_8000_0007_EBX,
  CPUID_7_EDX,
 };
 
@@ -65,7 +67,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
    (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) || \
    (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK14)) || \
    (((bit)>>5)==15 && (1UL<<((bit)&31) & REQUIRED_MASK15)) || \
-   (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) )
+   (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) || \
+   (((bit)>>5)==17 && (1UL<<((bit)&31) & REQUIRED_MASK17)) || \
+   (((bit)>>5)==18 && (1UL<<((bit)&31) & REQUIRED_MASK18)) )
 
 #define DISABLED_MASK_BIT_SET(bit) \
  ( (((bit)>>5)==0  && (1UL<<((bit)&31) & DISABLED_MASK0 )) || \
@@ -84,7 +88,9 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
    (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) || \
    (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK14)) || \
    (((bit)>>5)==15 && (1UL<<((bit)&31) & DISABLED_MASK15)) || \
-   (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) )
+   (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) || \
+   (((bit)>>5)==17 && (1UL<<((bit)&31) & DISABLED_MASK17)) || \
+   (((bit)>>5)==18 && (1UL<<((bit)&31) & DISABLED_MASK18)) )
 
 #define cpu_has(c, bit) \
  (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 8db6b345e199..60062f510648 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -12,7 +12,7 @@
 /*
  * Defines x86 CPU feature bits
  */
-#define NCAPINTS 17 /* N 32-bit words worth of info */
+#define NCAPINTS 19 /* N 32-bit words worth of info */
 #define NBUGINTS 1 /* N 32-bit bug flags */
 
 /*
@@ -297,11 +297,11 @@
 #define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
 #define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */
 
-/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 16 */
-#define X86_FEATURE_SPEC_CTRL (16*32+26) /* "" Speculation Control (IBRS + IBPB) */
-#define X86_FEATURE_INTEL_STIBP (16*32+27) /* "" Single Thread Indirect Branch Predictors */
-#define X86_FEATURE_ARCH_CAPABILITIES (16*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
-#define X86_FEATURE_SPEC_CTRL_SSBD (16*32+31) /* "" Speculative Store Bypass Disable */
+/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
+#define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */
+#define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */
+#define X86_FEATURE_ARCH_CAPABILITIES (18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
+#define X86_FEATURE_SPEC_CTRL_SSBD (18*32+31) /* "" Speculative Store Bypass Disable */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index d1865655c975..c06553e2bae4 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -56,5 +56,7 @@
 #define DISABLED_MASK14 0
 #define DISABLED_MASK15 0
 #define DISABLED_MASK16 0
+#define DISABLED_MASK17 0
+#define DISABLED_MASK18 0
 
 #endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index 4916144e3c42..4660863b6f6b 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -99,5 +99,7 @@
 #define REQUIRED_MASK14 0
 #define REQUIRED_MASK15 0
 #define REQUIRED_MASK16 0
+#define REQUIRED_MASK17 0
+#define REQUIRED_MASK18 0
 
 #endif /* _ASM_X86_REQUIRED_FEATURES_H */
--
2.17.0


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[SRU][Xenial][PATCH 3/6] UBUNTU: SAUCE: x86: Remove double include

Juerg Haefliger
In reply to this post by Juerg Haefliger
CVE-2018-3639 (x86)

Fixes: f3b21b13cecf ("UBUNTU: SAUCE: x86/bugs: Honour SPEC_CTRL default")
Signed-off-by: Juerg Haefliger <[hidden email]>
---
 arch/x86/include/asm/mwait.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h
index 196f98393b34..9821763b02cf 100644
--- a/arch/x86/include/asm/mwait.h
+++ b/arch/x86/include/asm/mwait.h
@@ -5,7 +5,6 @@
 
 #include <asm/cpufeature.h>
 #include <asm/spec_ctrl.h>
-#include <asm/spec-ctrl.h>
 #include <asm/microcode.h>
 
 #define MWAIT_SUBSTATE_MASK 0xf
--
2.17.0


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[SRU][Xenial][PATCH 4/6] UBUNTU: SAUCE: proc: Remove empty line in /proc/$pid/status

Juerg Haefliger
In reply to this post by Juerg Haefliger
CVE-2018-3639 (x86)

Fixes: c2f3edf414c2 ("UBUNTU: SAUCE: proc: Provide details on speculation flaw mitigations")
Signed-off-by: Juerg Haefliger <[hidden email]>
---
 fs/proc/array.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/proc/array.c b/fs/proc/array.c
index 8930b068199d..93c664097cb9 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -334,7 +334,7 @@ static inline void task_seccomp(struct seq_file *m, struct task_struct *p)
 #ifdef CONFIG_SECCOMP
  seq_printf(m, "Seccomp:\t%d\n", p->seccomp.mode);
 #endif
- seq_printf(m, "\nSpeculation_Store_Bypass:\t");
+ seq_printf(m, "Speculation_Store_Bypass:\t");
  switch (arch_prctl_spec_ctrl_get(p, PR_SPEC_STORE_BYPASS)) {
  case -EINVAL:
  seq_printf(m, "unknown");
--
2.17.0


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[SRU][Xenial][PATCH 5/6] UBUNTU: SAUCE: x86/pti: Evaluate X86_BUG_CPU_MELTDOWN when pti=auto

Juerg Haefliger
In reply to this post by Juerg Haefliger
CVE-2018-3639 (x86)

Commit f93e1bcdb1dd ("x86/pti: Do not enable PTI on CPUs which are not
vulnerable to Meltdown") introduced a smarter detection of CPUs that
are not affected by Meltdown. Make use of that when pti=auto which also
matches Linus' tree.

While at it, remove the unused variable 'enable'.

Signed-off-by: Juerg Haefliger <[hidden email]>
---
 arch/x86/mm/kaiser.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/x86/mm/kaiser.c b/arch/x86/mm/kaiser.c
index 7a72e32e4806..5a2d27a880e9 100644
--- a/arch/x86/mm/kaiser.c
+++ b/arch/x86/mm/kaiser.c
@@ -278,7 +278,6 @@ static void __init kaiser_init_all_pgds(void)
 
 void __init kaiser_check_boottime_disable(void)
 {
- bool enable = true;
  char arg[5];
  int ret;
 
@@ -301,13 +300,11 @@ void __init kaiser_check_boottime_disable(void)
  goto disable;
 
 skip:
- if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+ if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
  goto disable;
 
 enable:
- if (enable)
- setup_force_cpu_cap(X86_FEATURE_KAISER);
-
+ setup_force_cpu_cap(X86_FEATURE_KAISER);
  return;
 
 disable:
--
2.17.0


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[SRU][Xenial][PATCH 6/6] UBUNTU: SAUCE: x86/speculation: Query individual feature flags when reloading microcode

Juerg Haefliger
In reply to this post by Juerg Haefliger
CVE-2018-3639 (x86)

We now have individual feature flags for IBRS and IBPB, so query them when
reloading microcode. Just like we do on boot (in
arch/x86/kernel/cpu/common.c).

Signed-off-by: Juerg Haefliger <[hidden email]>
---
 arch/x86/kernel/cpu/microcode/core.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 55d4f5cc353b..63e3db171945 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -439,22 +439,26 @@ static ssize_t reload_store(struct device *dev,
  if (!ret)
  perf_check_microcode();
 
- if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {
- printk_once(KERN_INFO "FEATURE SPEC_CTRL Present\n");
+ /* Initialize Indirect Branch Prediction Barrier if supported */
+ if (boot_cpu_has(X86_FEATURE_IBPB)) {
+ setup_force_cpu_cap(X86_FEATURE_USE_IBPB);
+ pr_info("Enabling Indirect Branch Prediction Barrier\n");
+
  mutex_lock(&spec_ctrl_mutex);
- set_ibrs_supported();
  set_ibpb_supported();
- if (ibrs_inuse)
- sysctl_ibrs_enabled = 1;
  if (ibpb_inuse)
  sysctl_ibpb_enabled = 1;
  mutex_unlock(&spec_ctrl_mutex);
- } else if (boot_cpu_has(X86_FEATURE_IBPB)) {
- printk_once(KERN_INFO "FEATURE IBPB Present\n");
+ }
+
+ /* Initialize Indirect Branch Restricted Speculation if supported */
+ if (boot_cpu_has(X86_FEATURE_IBRS)) {
+ pr_info("Enabling Indirect Branch Restricted Speculation\n");
+
  mutex_lock(&spec_ctrl_mutex);
- set_ibpb_supported();
- if (ibpb_inuse)
- sysctl_ibpb_enabled = 1;
+ set_ibrs_supported();
+ if (ibrs_inuse)
+ sysctl_ibrs_enabled = 1;
  mutex_unlock(&spec_ctrl_mutex);
  }
 
--
2.17.0


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ACK/cmnt: [SRU][Xenial][PATCH 1-3, 5, 6] Fixups for CVE-2018-3639 (x86)

Stefan Bader-2
In reply to this post by Juerg Haefliger
On 30.05.2018 04:38, Juerg Haefliger wrote:

> Misc subsequent fixups and cleanups for CVE-2018-3639 (x86).
>
> Signed-off-by: Juerg Haefliger <[hidden email]>
>
>
> Huaitong Han (1):
>   KVM: x86: remove magic number with enum cpuid_leafs
>
> Juerg Haefliger (5):
>   UBUNTU: SAUCE: x86/cpufeatures: Move CPUID_7_EDX CPUID bits to word 18
>   UBUNTU: SAUCE: x86: Remove double include
>   UBUNTU: SAUCE: proc: Remove empty line in /proc/$pid/status
>   UBUNTU: SAUCE: x86/pti: Evaluate X86_BUG_CPU_MELTDOWN when pti=auto
>   UBUNTU: SAUCE: x86/speculation: Query individual feature flags when
>     reloading microcode
>
>  arch/x86/include/asm/cpufeature.h        | 10 ++++--
>  arch/x86/include/asm/cpufeatures.h       | 12 +++----
>  arch/x86/include/asm/disabled-features.h |  2 ++
>  arch/x86/include/asm/mwait.h             |  1 -
>  arch/x86/include/asm/required-features.h |  2 ++
>  arch/x86/kernel/cpu/microcode/core.c     | 24 +++++++------
>  arch/x86/kvm/cpuid.c                     | 44 ++++++++++++------------
>  arch/x86/mm/kaiser.c                     |  7 ++--
>  fs/proc/array.c                          |  2 +-
>  9 files changed, 57 insertions(+), 47 deletions(-)
>
Patch #4 (proc newline) was submitted separately linking to a bug filed. The
rest looked ok.


Acked-by: Stefan Bader <[hidden email]>





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ACK: [SRU][Xenial][PATCH 0/6] Fixups for CVE-2018-3639 (x86)

Kleber Sacilotto de Souza
In reply to this post by Juerg Haefliger
On 05/30/18 04:38, Juerg Haefliger wrote:

> Misc subsequent fixups and cleanups for CVE-2018-3639 (x86).
>
> Signed-off-by: Juerg Haefliger <[hidden email]>
>
>
> Huaitong Han (1):
>   KVM: x86: remove magic number with enum cpuid_leafs
>
> Juerg Haefliger (5):
>   UBUNTU: SAUCE: x86/cpufeatures: Move CPUID_7_EDX CPUID bits to word 18
>   UBUNTU: SAUCE: x86: Remove double include
>   UBUNTU: SAUCE: proc: Remove empty line in /proc/$pid/status
>   UBUNTU: SAUCE: x86/pti: Evaluate X86_BUG_CPU_MELTDOWN when pti=auto
>   UBUNTU: SAUCE: x86/speculation: Query individual feature flags when
>     reloading microcode
>
>  arch/x86/include/asm/cpufeature.h        | 10 ++++--
>  arch/x86/include/asm/cpufeatures.h       | 12 +++----
>  arch/x86/include/asm/disabled-features.h |  2 ++
>  arch/x86/include/asm/mwait.h             |  1 -
>  arch/x86/include/asm/required-features.h |  2 ++
>  arch/x86/kernel/cpu/microcode/core.c     | 24 +++++++------
>  arch/x86/kvm/cpuid.c                     | 44 ++++++++++++------------
>  arch/x86/mm/kaiser.c                     |  7 ++--
>  fs/proc/array.c                          |  2 +-
>  9 files changed, 57 insertions(+), 47 deletions(-)
>

Acked-by: Kleber Sacilotto de Souza <[hidden email]>

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APPLIED: [SRU][Xenial][PATCH 0/6] Fixups for CVE-2018-3639 (x86)

Khaled Elmously
In reply to this post by Juerg Haefliger
This has already been applied to Xenial by Juerg


On 2018-05-30 13:38:11 , Juerg Haefliger wrote:

> Misc subsequent fixups and cleanups for CVE-2018-3639 (x86).
>
> Signed-off-by: Juerg Haefliger <[hidden email]>
>
>
> Huaitong Han (1):
>   KVM: x86: remove magic number with enum cpuid_leafs
>
> Juerg Haefliger (5):
>   UBUNTU: SAUCE: x86/cpufeatures: Move CPUID_7_EDX CPUID bits to word 18
>   UBUNTU: SAUCE: x86: Remove double include
>   UBUNTU: SAUCE: proc: Remove empty line in /proc/$pid/status
>   UBUNTU: SAUCE: x86/pti: Evaluate X86_BUG_CPU_MELTDOWN when pti=auto
>   UBUNTU: SAUCE: x86/speculation: Query individual feature flags when
>     reloading microcode
>
>  arch/x86/include/asm/cpufeature.h        | 10 ++++--
>  arch/x86/include/asm/cpufeatures.h       | 12 +++----
>  arch/x86/include/asm/disabled-features.h |  2 ++
>  arch/x86/include/asm/mwait.h             |  1 -
>  arch/x86/include/asm/required-features.h |  2 ++
>  arch/x86/kernel/cpu/microcode/core.c     | 24 +++++++------
>  arch/x86/kvm/cpuid.c                     | 44 ++++++++++++------------
>  arch/x86/mm/kaiser.c                     |  7 ++--
>  fs/proc/array.c                          |  2 +-
>  9 files changed, 57 insertions(+), 47 deletions(-)
>
> --
> 2.17.0
>
>
> --
> kernel-team mailing list
> [hidden email]
> https://lists.ubuntu.com/mailman/listinfo/kernel-team

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