[SRU v2] [B/C] [PATCH 0/2] Fix non-working pinctrl-intel

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[SRU v2] [B/C] [PATCH 0/2] Fix non-working pinctrl-intel

Kai-Heng Feng
BugLink: https://bugs.launchpad.net/bugs/1811777

v2: Omit these two commits:
  pinctrl: intel: Do pin translation when lock IRQ
  Revert "pinctrl: intel: Do pin translation when lock IRQ"

[Impact]
Intel pinctrl doesn't work.
There's a WWAN card needs to use pinctrl to reset itself after firmware
update. Currently we can't use pinctrl to reset it.

[Fix]
Translate GPIO to pinctrl pins correctly.

[Test]
The WWAN reset function works once the fix is applied.

[Regression Potential]
Low. Limits to pinctrl-intel and it's in mainline for a while.

Javier Arteaga (1):
  pinctrl: intel: Implement intel_gpio_get_direction callback

Mika Westerberg (1):
  pinctrl: intel: Do pin translation in other GPIO operations as well

 drivers/pinctrl/intel/pinctrl-intel.c | 128 ++++++++++++++++----------
 1 file changed, 81 insertions(+), 47 deletions(-)

--
2.17.1


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[B] [PATCH 1/2] pinctrl: intel: Implement intel_gpio_get_direction callback

Kai-Heng Feng
From: Javier Arteaga <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1811777

Allows querying GPIO direction from the pad config register.
If the pad is not in GPIO mode, return an error.

Signed-off-by: Javier Arteaga <[hidden email]>
Reviewed-by: Andy Shevchenko <[hidden email]>
Acked-by: Mika Westerberg <[hidden email]>
Signed-off-by: Linus Walleij <[hidden email]>
(cherry picked from commit 67e6d3e83c18188bdc1467663c49787f8d4fdc0d)
Signed-off-by: Kai-Heng Feng <[hidden email]>
---
 drivers/pinctrl/intel/pinctrl-intel.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 4c2369a8d926..4be827f136d1 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -783,6 +783,24 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  raw_spin_unlock_irqrestore(&pctrl->lock, flags);
 }
 
+static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
+{
+ struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+ void __iomem *reg;
+ u32 padcfg0;
+
+ reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+ if (!reg)
+ return -EINVAL;
+
+ padcfg0 = readl(reg);
+
+ if (padcfg0 & PADCFG0_PMODE_MASK)
+ return -EINVAL;
+
+ return !!(padcfg0 & PADCFG0_GPIOTXDIS);
+}
+
 static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 {
  return pinctrl_gpio_direction_input(chip->base + offset);
@@ -799,6 +817,7 @@ static const struct gpio_chip intel_gpio_chip = {
  .owner = THIS_MODULE,
  .request = gpiochip_generic_request,
  .free = gpiochip_generic_free,
+ .get_direction = intel_gpio_get_direction,
  .direction_input = intel_gpio_direction_input,
  .direction_output = intel_gpio_direction_output,
  .get = intel_gpio_get,
--
2.17.1


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[B/C] [PATCH 2/2] pinctrl: intel: Do pin translation in other GPIO operations as well

Kai-Heng Feng
In reply to this post by Kai-Heng Feng
From: Mika Westerberg <[hidden email]>

BugLink: https://bugs.launchpad.net/bugs/1811777

For some reason I thought GPIOLIB handles translation from GPIO ranges
to pinctrl pins but it turns out not to be the case. This means that
when GPIOs operations are performed for a pin controller having a custom
GPIO base such as Cannon Lake and Ice Lake incorrect pin number gets
used internally.

Fix this in the same way we did for lock/unlock IRQ operations and
translate the GPIO number to pin before using it.

Fixes: a60eac3239f0 ("pinctrl: intel: Allow custom GPIO base for pad groups")
Reported-by: Rajat Jain <[hidden email]>
Signed-off-by: Mika Westerberg <[hidden email]>
Tested-by: Rajat Jain <[hidden email]>
Signed-off-by: Linus Walleij <[hidden email]>
(backported from commit 96147db1e1dff83679e71ac92193cbcab761a14c)
Signed-off-by: Kai-Heng Feng <[hidden email]>
---
 drivers/pinctrl/intel/pinctrl-intel.c | 111 +++++++++++++++-----------
 1 file changed, 63 insertions(+), 48 deletions(-)

diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 4be827f136d1..c19a4c45f7bb 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -745,13 +745,63 @@ static const struct pinctrl_desc intel_pinctrl_desc = {
  .owner = THIS_MODULE,
 };
 
+/**
+ * intel_gpio_to_pin() - Translate from GPIO offset to pin number
+ * @pctrl: Pinctrl structure
+ * @offset: GPIO offset from gpiolib
+ * @commmunity: Community is filled here if not %NULL
+ * @padgrp: Pad group is filled here if not %NULL
+ *
+ * When coming through gpiolib irqchip, the GPIO offset is not
+ * automatically translated to pinctrl pin number. This function can be
+ * used to find out the corresponding pinctrl pin.
+ */
+static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
+     const struct intel_community **community,
+     const struct intel_padgroup **padgrp)
+{
+ int i;
+
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ const struct intel_community *comm = &pctrl->communities[i];
+ int j;
+
+ for (j = 0; j < comm->ngpps; j++) {
+ const struct intel_padgroup *pgrp = &comm->gpps[j];
+
+ if (pgrp->gpio_base < 0)
+ continue;
+
+ if (offset >= pgrp->gpio_base &&
+    offset < pgrp->gpio_base + pgrp->size) {
+ int pin;
+
+ pin = pgrp->base + offset - pgrp->gpio_base;
+ if (community)
+ *community = comm;
+ if (padgrp)
+ *padgrp = pgrp;
+
+ return pin;
+ }
+ }
+ }
+
+ return -EINVAL;
+}
+
 static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
  struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
  void __iomem *reg;
  u32 padcfg0;
+ int pin;
+
+ pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+ if (pin < 0)
+ return -EINVAL;
 
- reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+ reg = intel_get_padcfg(pctrl, pin, PADCFG0);
  if (!reg)
  return -EINVAL;
 
@@ -768,8 +818,13 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  unsigned long flags;
  void __iomem *reg;
  u32 padcfg0;
+ int pin;
+
+ pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+ if (pin < 0)
+ return;
 
- reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+ reg = intel_get_padcfg(pctrl, pin, PADCFG0);
  if (!reg)
  return;
 
@@ -788,8 +843,13 @@ static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
  struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
  void __iomem *reg;
  u32 padcfg0;
+ int pin;
 
- reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+ pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+ if (pin < 0)
+ return -EINVAL;
+
+ reg = intel_get_padcfg(pctrl, pin, PADCFG0);
  if (!reg)
  return -EINVAL;
 
@@ -825,51 +885,6 @@ static const struct gpio_chip intel_gpio_chip = {
  .set_config = gpiochip_generic_config,
 };
 
-/**
- * intel_gpio_to_pin() - Translate from GPIO offset to pin number
- * @pctrl: Pinctrl structure
- * @offset: GPIO offset from gpiolib
- * @commmunity: Community is filled here if not %NULL
- * @padgrp: Pad group is filled here if not %NULL
- *
- * When coming through gpiolib irqchip, the GPIO offset is not
- * automatically translated to pinctrl pin number. This function can be
- * used to find out the corresponding pinctrl pin.
- */
-static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
-     const struct intel_community **community,
-     const struct intel_padgroup **padgrp)
-{
- int i;
-
- for (i = 0; i < pctrl->ncommunities; i++) {
- const struct intel_community *comm = &pctrl->communities[i];
- int j;
-
- for (j = 0; j < comm->ngpps; j++) {
- const struct intel_padgroup *pgrp = &comm->gpps[j];
-
- if (pgrp->gpio_base < 0)
- continue;
-
- if (offset >= pgrp->gpio_base &&
-    offset < pgrp->gpio_base + pgrp->size) {
- int pin;
-
- pin = pgrp->base + offset - pgrp->gpio_base;
- if (community)
- *community = comm;
- if (padgrp)
- *padgrp = pgrp;
-
- return pin;
- }
- }
- }
-
- return -EINVAL;
-}
-
 static void intel_gpio_irq_ack(struct irq_data *d)
 {
  struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
--
2.17.1


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ACK: [SRU v2] [B/C] [PATCH 0/2] Fix non-working pinctrl-intel

Stefan Bader-2
In reply to this post by Kai-Heng Feng
On 22.01.19 10:04, Kai-Heng Feng wrote:

> BugLink: https://bugs.launchpad.net/bugs/1811777
>
> v2: Omit these two commits:
>   pinctrl: intel: Do pin translation when lock IRQ
>   Revert "pinctrl: intel: Do pin translation when lock IRQ"
>
> [Impact]
> Intel pinctrl doesn't work.
> There's a WWAN card needs to use pinctrl to reset itself after firmware
> update. Currently we can't use pinctrl to reset it.
>
> [Fix]
> Translate GPIO to pinctrl pins correctly.
>
> [Test]
> The WWAN reset function works once the fix is applied.
>
> [Regression Potential]
> Low. Limits to pinctrl-intel and it's in mainline for a while.
>
> Javier Arteaga (1):
>   pinctrl: intel: Implement intel_gpio_get_direction callback
>
> Mika Westerberg (1):
>   pinctrl: intel: Do pin translation in other GPIO operations as well
>
>  drivers/pinctrl/intel/pinctrl-intel.c | 128 ++++++++++++++++----------
>  1 file changed, 81 insertions(+), 47 deletions(-)
>
Acked-by: Stefan Bader <[hidden email]>


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ACK: [SRU v2] [B/C] [PATCH 0/2] Fix non-working pinctrl-intel

Khaled Elmously
In reply to this post by Kai-Heng Feng
On 2019-01-22 17:04:40 , Kai-Heng Feng wrote:

> BugLink: https://bugs.launchpad.net/bugs/1811777
>
> v2: Omit these two commits:
>   pinctrl: intel: Do pin translation when lock IRQ
>   Revert "pinctrl: intel: Do pin translation when lock IRQ"
>
> [Impact]
> Intel pinctrl doesn't work.
> There's a WWAN card needs to use pinctrl to reset itself after firmware
> update. Currently we can't use pinctrl to reset it.
>
> [Fix]
> Translate GPIO to pinctrl pins correctly.
>
> [Test]
> The WWAN reset function works once the fix is applied.
>
> [Regression Potential]
> Low. Limits to pinctrl-intel and it's in mainline for a while.
>
> Javier Arteaga (1):
>   pinctrl: intel: Implement intel_gpio_get_direction callback
>
> Mika Westerberg (1):
>   pinctrl: intel: Do pin translation in other GPIO operations as well
>
>  drivers/pinctrl/intel/pinctrl-intel.c | 128 ++++++++++++++++----------
>  1 file changed, 81 insertions(+), 47 deletions(-)
>

Acked-by: Khalid Elmously <[hidden email]>


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APPLIED: [SRU v2] [B/C] [PATCH 0/2] Fix non-working pinctrl-intel

Khaled Elmously
In reply to this post by Kai-Heng Feng
On 2019-01-22 17:04:40 , Kai-Heng Feng wrote:

> BugLink: https://bugs.launchpad.net/bugs/1811777
>
> v2: Omit these two commits:
>   pinctrl: intel: Do pin translation when lock IRQ
>   Revert "pinctrl: intel: Do pin translation when lock IRQ"
>
> [Impact]
> Intel pinctrl doesn't work.
> There's a WWAN card needs to use pinctrl to reset itself after firmware
> update. Currently we can't use pinctrl to reset it.
>
> [Fix]
> Translate GPIO to pinctrl pins correctly.
>
> [Test]
> The WWAN reset function works once the fix is applied.
>
> [Regression Potential]
> Low. Limits to pinctrl-intel and it's in mainline for a while.
>
> Javier Arteaga (1):
>   pinctrl: intel: Implement intel_gpio_get_direction callback
>
> Mika Westerberg (1):
>   pinctrl: intel: Do pin translation in other GPIO operations as well
>
>  drivers/pinctrl/intel/pinctrl-intel.c | 128 ++++++++++++++++----------
>  1 file changed, 81 insertions(+), 47 deletions(-)
>
> --
> 2.17.1
>
>
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